. Given the function:  F(a, b, c) = (a + b)’c + a b c’ + a c a) Create the truth table for function F. 7b) Implement F by means of an 8-to-1 Multiplexer using block diagrams. Implement F by means of a 3-to-8 Decoder using block diagrams and any gates if needed.

Given a boolean function F(A.B.C.D)= A@C+B.c@D implement the boolean function F(A,B.C.D) using only NOR gates with only 2 inputs, in other words write the equivalent expression of F using only NAND(variable1 variable2)?

Implement the following function with a8-to-1-line Multiplexer with threeselection lines? Draw the truth table and the corresponding block diagram for the MUX?F(A, B, C, D) = Σm ( 1, 3, 4, 11, 12, 13,14,15 )

Build function f (x1, X2, X3, X4) = II M(0, 2, 5, 6, 9, 14) using Shannon's Expansion and the given Multiplexer circuit. Show all your work. X4 X1 X3 f

assuming (47) based 10 = (abcdefg) based 2,  consider the Boolean function F (A B C D)given by the followingtruth table for all the questions:  a) Implement F( ABCD) using a 8x1 MUX and external gates, choosing inputs A, B, C as the selection inputs of the MUX.b) Implement F( ABCD) using a 8x1 MUX and external gates, choosing inputs B, C, D as the selection inputs of the MUX.c) Implement F( ABCD ) using a 4x1 MUX and external gates, choosing inputs B and C as the selection inputs of the MUX.

Q1: Implement the following function using 1x2 Decoders with active high and OR gate F(A,B,C)=Σm(0,3,5,6) (4 Marks)

Given the following functions, F(A, B, C) = Em(0, 4, 6, 7) G(A, B, C) = [IM(1, 2, 3,4, 7) a. Implement both functions using a PROM chip (draw full grid) b. Implement both functions using as many 2:4 decoders chips (with a single active low enable) and any other logic gates needed in one circuit.