A program consists of 100,000 instructions as follows: Instruction Type Integer arithmetic Data transfer Floating-point arithmetic Control transfer O 1.33 O None them O 1.44 Instruction Count O 1.22 O 1.11 45,000 32,000 15,000 8,000 Cycles per Instruction 3 For machine M with CPU of 850 MHz, we just added another CPU with the same speed. Assuming 50 % of instructions must be executed sequentially, what is the speedup of machine M? 4 8 3

Suppose we have the instruction Load 1000. Given memory and register R1 contain the values below: Assuming R1 is implied in the indexed addressing mode, determine the actual value loaded into the accumulator and fill in the table below:

Question 20 Consider two different machines with two different instruction sets, both of which have a clock rate of 800 MHz. The following measurements are recorded on the two machines running a given set of benchmark programs. Instruction Type Machine A Arithmetic and logic Load and store Branch Others Machine B Arithmetic and logic Load and store Branch Others O 50 ms O 70 ms O 55.2 ms O 60 ms Instruction Count (millions) O None of them 8 4 2 4 10 8 2 4 Cycles per Instruction 1 3 4 With machine A, how long would it take to execute the program? 3 1 2 4 3

Calculate the CPU execution time (expressed in milliseconds) of a program with 10 million instructions on a 2.5 GHz CPU with the following basic instruction-type breakdowns and CPIs: Arithmetic: 60%, CPI = 2 Load & Store (assuming perfect caches): 25%, CPI = 5 Branching: 15%, CPI = 3 In addition, you are told that the overall cache miss rate for instructions is 1%, the overall cache miss rate for data is 3%, and the cache miss penalty is 100 cycles. You can ignore the hit time (consider it zero).