A sequential circuit has two inputs, w₁ and w₂, and an output, z. Its function is to compare the input sequences on the two inputs. If w₁=w₂ during any four consecutive clock cycles, the circuit produces z = 1; otherwise, z = 0. For example w₁ 0110111000110 w₂: 1110101000111 z: 0000100001110

Draw a Moore (or mealy) finite state machine that can detect the pattern 1001 or 1100, while reading a sequence of binary numbers

Consider a circuit designed as follows: • one 1-bit register (like those discussed in class), with an attached clock • one not gate • wire A connects the register's ouput and the not's input • wire B connects the not's output and the register's input If we put a 1 onto wire B: A. wire A gets a 0 immediately B. wire A gets a 0 after the short delay it takes the gates in the register to finish work C. wire A gets a 0 after the next clock tick D. wire A gets a 1 immediately E. wire A gets a 1 after the short delay it takes the gates in the register to finish work O F. wire A gets a 1 after the next clock tick

Given the state table below, the output sequence generated by an input sequence X = 1110001 and starting state a is * PS X NS Z Note: a a 1 PS = Present State X = Input NS = Next State Z = Output a 1 b b a 1 1 1 d. 1 d. b 1 d 1 a O z = 0011110 O z = 0110100 O z = 0011010 Z = 0011100 O z = 0111011