(a)  State Euclid's Theorem using quantifiers. (b)  Negate your expression in (a) and simplify until it resembles the logic used in the proof of Euclid's Theorem.

Design a Moore state machine with one input x, and one output y. The output is normally 0, but becomes 1 whenever the machine detects the sequence "x = 0", "x = 1", and "x = 1" on the three consecutive rising edges of the clock.  Sketch a state graph for your design. Write down the state table for your design Come up with a state assignment Find the excitation logic for D flip flips Sketch a diagram of your final design.