Assume that the operation times of one add instruction for the major functional units are 325 ps for memory access, 185 ps for ALU operations and 125 ps for register file read/writes. Please fill the table first and perform the following        a )What is the total cycle in single-cycle implementation?   b )What is the total cycle in pipelining implementation?  c) What is the total cycle in pipelining implementation if there are 5 million add instructions? d) What is the total cycle in pipelining implementation for 5 million add instructions, if the stages are balanced? e)What is the speed up of pipelining implementation over single-cycle implementation?

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Author:James Kurose, Keith Ross
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Assume that the operation times of one add instruction for the major functional units are 325 ps for memory access, 185 ps for ALU operations and 125 ps for register file read/writes. Please fill the table first and perform the following

       a )What is the total cycle in single-cycle implementation?

  b )What is the total cycle in pipelining implementation?

 c) What is the total cycle in pipelining implementation if there are 5 million add instructions?

d) What is the total cycle in pipelining implementation for 5 million add instructions, if the stages are balanced?

e)What is the speed up of pipelining implementation over single-cycle implementation?

Instruction
IF
ID
EX
МЕМ
WB
add
Transcribed Image Text:Instruction IF ID EX МЕМ WB add
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