Control or data parallelism, which sort of program-level parallelism works better with one instruction many data? Which technique to parallelism at the program level is most suited for MIMD?

Problem 5: Suppose the program counter (PC) is set to 0x60000000hex. a. What range of addresses can be reached using the RISC-V jump-and-link (jal) instruction? (In other words, what is the set of possible values for the PC after the jump instruction executes?) b. What range of addresses can be reached using the RISC-V branch if equal (beq) instruction? (In other words, what is the set of possible values for the PC after the branch instruction executes?)

For example, suppose an instruction is not accepted and VA page 30 is generated. For the following use cases, a TLB controlled by software might be preferable than one handled by hardware:

Which kind of program-level parallelism, data or control, is more ideally suited for the SIMD instruction set? Which sort of parallelism at the programme level does MIND do most effectively?