Draw the timing diagram of a 3-bit asynchronous binary counter

Design a Mealy machine to detect when a value is not BCD, for example when 1111 is generated it should detect that it is not a BCD value.

Define clock skew.

For the circuit shown below, Show the value of "Y2Y1Y0" after each clock for 8 clock pulses (the initial state is Y2Y1YO = "000" 2. MUX 4 1. A0 A2 A1 YO Y2 Y1 Clock

Design a circuit that multiply two 2 bit numbers ( A1A0 , B1B0) by using 4-to-16 Decoder.

Create a Minterm expansion and design a digital circuit based off the truth table

13. Using the I/O table, construct the appropriate Boolean expression, in CDNF, and a circuit for that expression x y z f(x,y,z) 1 1 1 1 1 100 10 10 1000 0 1 1 0 0 1 0 0 0 0 10 0001

2. Design a 4-bit binary up counter (like the following state diagram) using JK flip flops. State diagram. eg. 0000-0001 Present state A3 A₂ A₁ A₂ 0 0 0 0 0 0 0 1 (a) Draw the state table with the input values for J K flip flops Next state A; A₂ A₁ A 00 0 1 001 0 1111 Flip-flop Inputs JA3 KA3 JA2 KA2 JAI KAI JAO KAO 0 X 0 X 0 1 x 0 x 0 x 1 x 1 (b) Simplify the input equations by K map (c) Draw the logic diagram

Type your question here • Design a 3-bit synchronous counter using J-K FFs only.

4 bit 2’s Complement Multiplier INPUT A: 4 bit 2’s Complement numberINPUT B: 4 bit 2’s Complement numberOUTPUT: the product of A x B represented as a 8 bit 2’s Complement number   Do this:Build a 4 Bit UNSIGNED Multiplier as a subcircuit named UnsignedMultiplier use AND gate ,full and half adders for the circuit