Example 2 We want to send data from a node with network address A and physical address 10, located on one LAN, to a node with a network address P and physical address 95, located on another LAN. Because the two devices are located on different networks, we cannot use physical addresses only; the physical addresses only I have local influence. What we need here are universal addresses that can pass through the LAN boundaries. The network (logical) addresses have this characteristic. 10 A P 95 T2 Data AP 10 20 87 E Bus 71 20 F T 99 Ring N 33 66 Z 95 66 PA Data T2 T2 Data AP 99 33 Bus M 77

Based upon the 4 inputs of A, B, C, and D, I counted 28 transistors for this diagram. Could you explain what the process is to better understand how to translate this using only NAND gates?

For the chip below, determine the selection S2S1S0 that will generate a 1 at the Y output for the input conditions: I = 1z16l5|4|3|21110 = 00000100. Assume the device is enabled to have normal operation. U3 74LS151 EO- S2 S1 SO 15 14 H13 12 I0 YNO- 100 O_001 111 O 010 1654 3210 HHHH H H HE

NAND GATE( NEED ONLY HANDWRITTEN SOLUTION PLEASE OTHERWISE DOWNVOTE).