Computer Networking: A Top-Down Approach (7th Edition)
Computer Networking: A Top-Down Approach (7th Edition)
7th Edition
ISBN: 9780133594140
Author: James Kurose, Keith Ross
Publisher: PEARSON
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i li. * • O + M I1:EV 2 Digital logic design 2 L... -> Example 3: Design a logic circuit whose output is HIGH only when a majority of the inputs A, B and C are HIGH. Solution: Step 1 Truth Table: There are three inputs (A, B, and C) and one output, F. The truth table is then obtained from problem definition and is shown in Table. ABCF 0 00 0 0010 0 100 0 111 10 00 1011 1101 1 111 | Step 2 Minimization: Output, F in the truth table is simplified using a K-map. The output equation is obtained as F=AB+ C(A+B) 1. AB 00 01 F=AB+AC+BC OR 1 F-AB+ C(A+B) 10 1 Step 3 Logic diagram or Schematic: Using cquations of Step 2, the schematic is drawn as shown in Figure below. B. C v/o Example 4: Design a combinational circuit with three inputs, x, y and z, and the three outputs, A, B, and C. when the binary input is 0, 1, 2, or 3, the binary output is one greater than the input. When the binary input is 4, 5, 6, or 7, the binary output is one less than the input. Solution: Step 1 Truth Table: -There are three inputs (x, y, and z) and three outputs (A, B, and C). -The truth table is then obtained from problem definition( specifications of the circuit) and is shown in Table below: xy z ABC 000001 00 10 01001 1 0 1 11 00 10 0011 10 1 1 00 |110 10 1 11 1 1 10 Step 2 Minimization: Output, A, B and C in the truth table is simplified using a K-map. The output equation is obtained as: <>
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Transcribed Image Text:i li. * • O + M I1:EV 2 Digital logic design 2 L... -> Example 3: Design a logic circuit whose output is HIGH only when a majority of the inputs A, B and C are HIGH. Solution: Step 1 Truth Table: There are three inputs (A, B, and C) and one output, F. The truth table is then obtained from problem definition and is shown in Table. ABCF 0 00 0 0010 0 100 0 111 10 00 1011 1101 1 111 | Step 2 Minimization: Output, F in the truth table is simplified using a K-map. The output equation is obtained as F=AB+ C(A+B) 1. AB 00 01 F=AB+AC+BC OR 1 F-AB+ C(A+B) 10 1 Step 3 Logic diagram or Schematic: Using cquations of Step 2, the schematic is drawn as shown in Figure below. B. C v/o Example 4: Design a combinational circuit with three inputs, x, y and z, and the three outputs, A, B, and C. when the binary input is 0, 1, 2, or 3, the binary output is one greater than the input. When the binary input is 4, 5, 6, or 7, the binary output is one less than the input. Solution: Step 1 Truth Table: -There are three inputs (x, y, and z) and three outputs (A, B, and C). -The truth table is then obtained from problem definition( specifications of the circuit) and is shown in Table below: xy z ABC 000001 00 10 01001 1 0 1 11 00 10 0011 10 1 1 00 |110 10 1 11 1 1 10 Step 2 Minimization: Output, A, B and C in the truth table is simplified using a K-map. The output equation is obtained as: <>
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Plot Karnaugh map to realize expression for output F
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Logic circuit construction
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