Realize the following function, using only 2-input NAND-gates. Repeat using only 2-input NOR-gates. F = B'AC + B'D' + C'A' + C'BD

Figure below shows a 4-input OR gate built using a chain of gates. Determine the activity factors at each node in the circuit assuming the input probabilities PA= PB = Pc = PD=0.5. C D an am P = am Domz an am ng a

DISCUSSION: 1- Show that the output carry in a full adder circuit can be expressed as. Ci +1 = Gi + Pi Ci= {Gi Pi + Gi Ci) Al Bi PI Si Gi Ci+1 Ci 2- Using 4 Exclusive - OR gates and a 4 - bit Full adder circuit, construct a 4-bit parallel adder subtractor. Use an input select variable V so that when V-0, the circuit adds and when V- 1, the circuit subtracts. 3- Why the computers and calculators use full adder circuit and not use full subtractor? 4- What are the methods used to store the negative numbers in the computer memory? 5- Implement half subtractor circuit using NOR gates only.

A, B, C are the inputs, and D, E, F are the outputs. By “completely specified” it means that, for each current state, the next state for each possible input combination is specified.

Digital Logic Design4-bit Binary Adder / Subtractor

Design an excess-3 to BCD code converter, requiring that all invalid input combinations give 0000 as the output code. Use K-maps to simplify the circuit. Draw the circuit.

Q. A straight binary sequence is applied to a 4-bit DAC, and the output in figure below is observed. What is the problem? Output 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0000 1000 0010 0011 0010 -1010 0110 1110 0001 1001- -otor 1011 H0011 1101- 0111 1111 Binary input Electrical Engineering Department/ University of Baura

Answer is d)

For the function f = w'2w'3 + w1w2 Work the problem with a 4-1 multiplexer and with a 2-1 multiplexer. With the 2-1 multiplexer implementation you can choose a select input (say w1) and try to express the output f in terms of the data inputs (w2 and w3).

Q2) determine A>B, A