Systems Architecture
7th Edition
ISBN: 9781305080195
Author: Stephen D. Burd
Publisher: Cengage Learning
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The Processor immediately stops processing whatever it was doing when it received a signal. What happens when the mechanism kicks in is as follows: Spooling using B's interrupt signal, C's interrupt handler, and D's polling system.
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A given computer has a single cache memory (off-chip) with a 2 ns hit time and a 98% hitrate. Its main memory has 40 ns access time.i. What is the computer’s effective access time? ii. If an on-chip cache with a 0.5 ns hit time and a 94% hit rate is added to it, what isthe computer’s new effective access time? iii. How much of a speedup does the on-chip cache give the computer?
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