FinalExam_Sample_2022

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School

Pennsylvania State University *

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Course

200

Subject

Electrical Engineering

Date

Feb 20, 2024

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pdf

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7

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1 EE200 Final Exam Sample Spring 2022 Instructions and Policies: 1. You must bring your PSU ID card with you to the exam. Show your PSU ID card to the proctors when you submit your exam. 2. You have 110 minutes to complete this exam. 3. Warning: DO N OT put any answers in the code packet! Use the space provide in the exam itself. However, feel free to write in the code packet in the process of analyzing the code. 4. You are allowed one 8½” x 11” note sheet; you can use both sides of the page. The note sheet must be handwritten by you. Your name, PSU user ID, and lab section number must be in the upper left corner of one side of your note sheet. You must hand in all the exam booklet, code packet, datasheet, and your handwritten notes by the end of the exam. 5. This exam is closed book and closed note. You are only allowed to have one 8.5” x 11” handwritten note sheet, writing implements, and a purpose-built calculator. During the exam, you may not communicate with anyone other than the instructor and TAs. 6. Use of books, laptops, tablets, pads, cell phones, smartwatches, etc., is strictly prohibited during the exam. You must turn off all phones, smartwatches, and other mobile devices. 7. There may be partial credit for incomplete answers; write as much of the solution as you can. 8. You must show all of your work for a problem. Answers without derivations may receive no credit. 9. You must complete the exam within the time limit. You must stop writing when the time is up. 10. Any cheating will be reported to the university and result in failing the course. Problem Weight Score 1 25 2 25 3 25 4 25 Extra Credit 10 Total 100
2 Problem 1 (25 points) 1.1 (10 points) Refer to the CUPL code shown in Figure 1.1 in the code packet . Draw a state transition diagram that represents the behavior of the Moore finite state machine (FSM) implemented in the CUPL code. 1.2 (7 points) Figure 1.2 shows uncompleted Test vectors. Using the code from Figure 1.1 and the input signals, draw the output signals. Figure 1.2.Test vectors for Problem 1.2. - ABC ABC - > B c So -- St ABC - B ~ ! * BC S3 S2 & -- Des - AB * B PINA PINS PIN2 PIN3 PIN4 PIN 23 PIN2Z PIN2) L = locked = 0 LI uncuch =
3 1.3 (8 points) In Lab 24, we used pulse width modulation to control the intensity of a LED. The part 2 circuit diagram is shown in Figure 1.3 below . Assume that the PWM voltage is 3.3 V when the output from the dsPIC is high and 0 V when the output from the dsPIC is low. Also, assume that the LED is ideal and has a forward voltage drop of 1.6 V when it is illuminated and that no current flows through the diode when it is not illuminated. Determine the average power dissipated in the 330 Ω resistor when the PWM duty cycle is 40 %. Figure 1.3. The connection for the LED that was used to demonstrate PWM in Lab 24. PWM1H 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 dsPIC33EP64MC502-I/SP 330 ss v to myDAQ AI 1+ to myDAQ AGND AND AI 1- LED Fractional Duty Cycle = D = 0 DE PMW = 3 . 32 output = high PMW = O outlet = low L ED E ! GV Circuit for 'ont Okt Of 3302 330c2 - - LVR 1 + Ov Tr T T VPin25E . Ved E16 - - IRI0A VRIOV AVL - > - Vpingt VR + VIED = 0 - 3 . 3 + VR + 16 V = 0 401100D D = 0 . 4 VR = 1 . ZV (P) = + So PH) Ot o . 45 H - St Craft = So = out + I to ot = 0 . 4 x 87 -
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