Lab2_Template

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School

Clemson University *

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Course

425

Subject

Electrical Engineering

Date

Oct 30, 2023

Type

pdf

Pages

8

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Name :- Anirudh Kumar ASUID:- akuma282 EEE 425/591 LAB #02 1. Transistor Sizes Gate Name NMOS Width (nm) PMOS Width (nm) INVx03 945 1134 NOR 2x05 2127 5104 2. Create and Test Schematic a. (1) INVx03 schematic (2) NOR schematic
Name :- Anirudh Kumar ASUID:- akuma282 (3) *insert caption here
Name :- Anirudh Kumar ASUID:- akuma282 Figure 4 represents the INV and NOR Test Harnesses
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