Lab 11-12_ CPE 64(Finished)

Design a circuit using basic gates that accepts two decimal number of single digit and compute Binary Coded Decimal (BCD) number of each. The designed circuit then performs binary addition/subtraction in the following manner, When section mode pin is set to zero (0) the addition should be performed When section mode pin is set to one (1) the subtraction should be performed Use following bock diagram for circuit design and only provide details of the sub-circuits that are indicated with the sign of question marks only.

IC number for the OR gate is O a. 7400 O b. 7486 O c. 7408 O d. 7432 O e. 7404

(a) Consider the flipflop circuits below: (i) Name the 2 circuits given in the figure. Explain how they are different from each other. a. b. (ii) Choose from the list the input that triggers data to travel to the next flipflop in a counter. A: Input at top NAND gate B: Input at bottom NAND gate C: Clock input clk Q

Question 1 Here again, is our diagram of the half-adder from the previous page. Copy this half-adder to your paper. Then trace through the circuit and label the output wire for each gate. As an example, the output wire for the OR gate is labeled for you. P Q OR AND PVQ NOT AND sum -carry

Find: a. written simplified boolean expression b. written truth table c. all output that results in 1

Problem #2: Apply the input waveforms A, B and C of the figure below to a NOR gate and draw the output waveform. A B C

(c) Figure Q3(c)(i) shows a register and Figure Q3(c)(ii) shows the input waveforms (CLOCK and Data in) to the circuit. A1 A9 A10 A2 Function generator A3 A11 A12 AS A13 A6 A14 A7 A15 Data in Bop.7) ip.r 82p.7) Logic analyser U1 U2 U3 U4 UO 6. 1. 6 1 6 INVERTER 3 CLK 3 CLK oCLK CLK 5 K K 5 K K 4027 Clock Function generator Figure Q3(c)(i) (i) Determine the type of register as shown in Figure Q3(c)(i).

How do I use Multisim to build a f4-input multiplexor using NAND gates only? Please use some switches and indicators to demonstrate.

TRUE or FALSE 6. Power is connected to pins 7 and 14 of a 7408 quad two-input AND gate IC to allow voltage for all four AND gates on the IC. 7. An exclusive-NOR gate output is HIGH when the inputs are unequal. 8. An OR gate output is HIGH only if all the inputs are HIGH. 9. A waveform can be enabled or disabled by both AND and OR gates. 10. An exclusive-OR gate output is HIGH when the inputs are unequal.

IC number for the X-OR gate is O a. 7486 O b. 7432 O c. 7400 O d. 7408 O e. 7404

i need the answer quickly

The numbers from 0-9 and a no characters is the Basic 1 digit seven segment display * .can show False True In a (CA) method of 7 segments, the anodes of all the LED segments are * "connected to the logic "O False True Some times may run out of pins on your Arduino board and need to not extend it * .with shift registers True False

Needs Complete solution with 100 % accuracy.

If a MOSFET is to be used in the making of logic gates application then it must work in O a. Saturation O b. Triode c. Edge of saturation O d. None of the answers

what is the MAXIMUM number of diode OR gates that can be cascaded before the output is not recognized as logic high?

Find the circuit output by first finding the output of each gate, g simplify. D-DI D. (a) a. A-E+BCD b. A.B.BCD C. A+BCD d. None of the above

Analyze the logic function of the circuit A₁ B₁ CH D -S₁

None

The gate of a JFET is . . biased Select one: a. forward b. reverse as well as forward c. none of the above d. reverse

None

Verilog code for this logic gate

answere fast please question from DIGITAL LOGIC DESIGN  TOPIC : Designing Combinational Logic You are designing a water level circuit using 74ALS151 (8 to 1 Multiplexer IC)* When input is 0000 that means tank is empty.* When input is 1111 that means tank is full.* When input is below 5, that means water level is low.* So, make a circuit using 74ALS151 Multiplexer IC that shows a "low water" indicator light(by setting an output L to 1) when the water level drops below level 5.

Noise margin is the amount of O a. noise voltage that a logic gate can tolerate O b. signal voltage that a logic gate can tolerate O. both signal and noise voltage that a logic gate can tolerate O d. None of the choices are correct

9 Part 1 of 2 Mc Graw Hill Required information Consider the logic gate circuit shown in the given figure. A (S1)-0- B (S2)-0 C (S3)-0- AB B BC B+C What is the Boolean equation for the given figure? ***************** The Boolean equation for the given figure is (Click to select) Note: This is a multi-part question. Once an answer is submitted, you will be unable to return to this part.

IC 74LS83 is a a.4 to 1 multiplexer b. 5 bit parallel adder c.4 bit parallel adder d. X - OR Gate

Digital electronics

Using any design approach, plan and design the following problem: (show the Block Diagram, Truth Table, Simplification Approach Solution, Circuit Diagram) 2. Simple Security System A simple security system for two doors consists of a card reader and a keypad. Cand Reader To Door To Dor 2 To Alam Logic Circuit D E Keypad A person may open a particular door if he or she has a card containing the corresponding code and enters an authorized keypad code for that card. The outputs from the card reader are as follows: A B No card inserted Valid code for door 1 0 1 0 0 Valid code for door 2 1 1 Invalid card code 10 To unlock a door, a person must hold down the proper keys on the keypad and, then, insert the card in the reader. The authorized keypad codes for door 1 are 101 and 110, and the authorized keypad codes for door 2 are 101 and 011. If the card has an invalid code or if the wrong keypad code is entered, the alarm will ring when the card is inserted. If the correct keypad code is…

From the BCD code whose block diagram is given in the figure below, you can find the 7-segment LED display (with common anode) code. Solving combinational logic circuit will be designed. This type of commercially produced decoder is integrated State the features you consider important by researching the circuits. BCD input at the output of the decoder For the 0-9 values ​​of the information information, the following indicator figures will be seen and the values ​​other than these it will be considered arbitrary. Since the 7-segment LED display has a common anode, The logic "0" will be applied to the burned parts. Draw this circuit.

From the BCD code whose block diagram is given in the figure below, you can find the 7-segment LED display (with common anode) code. Solving combinational logic circuit will be designed. This type of commercially produced decoder is integrated State the features you consider important by researching the circuits. BCD input at the output of the decoder For the 0-9 values ​​of the information information, the following indicator figures will be seen and the values ​​other than these it will be considered arbitrary. Since the 7-segment LED display has a common anode, Logic "0" will be applied to the burned parts. The accuracy of the logic circuit you will design Create the table and find the output expressions by shrinking the table with the Karnaugh diagram method.

1. PLEASE EXPLAIN IN WRITING THE STEPS AND WHAT IS GOINING ON

Check the example on given.png, then solve the problems in the solve.png file

Please provide Handwritten answer

Note: Please do not handwritten.

Noise margin is the amount of O a. both signal and noise voltage that a logic gate can tolerate O b. noise voltage that a logic gate can tolerate O c. None of the choices are correct O d. signal voltage that a logic gate can tolerate