Lab 6 Report

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Pennsylvania State University *

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310

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Electrical Engineering

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Dec 6, 2023

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Moses Tonade Lab 6 Report Introduction In this lab we will be using an nMOS transistor as our active load working in parallel with two pMOS transistors acting as a current mirror. Circuit Schematics Task 1 In this figure, the current mirror schematic is shown where Q3 and Q2 are pMOS transistors and carry the current from the active load. The drain to gate voltage in this figure on Q3 - 0V, we assume that the device is operating in the saturation region.

Moses Tonade Lab 6 Report Task 2 Within this figure, we added a Q1 nMOS transistor, which is a common source amplifier. Resistors 1 and 2 had to be selected in order to allow the transistors to work in the saturation region still. Task 5 This common gate amplifier was created by removing the AC signal from the negative side of the capacitor.

Moses Tonade Lab 6 Report Task 7 For this task we needed to remake the circuit to where the output voltage was proportional to the nMOS transistor’s transconductance parameter. From this we made a small signal circuit to figure out the theoretical gain. Data and Graphs Task 1 I DS = 1 2 k p ( V SG 3 − | V Tp | ) 2 Using this equation where I DS = 100μA, k p = 850μA/V 2 , and V Tp = 1.55. We can find V SG3 to be equal to 2.03 V. Also using V S = 10V, V SG = 1.45V, we find V G = 7.49V. Using V/I, we can find R 3 by dividing 8.21V by 100μA leaving R 3 = 74.9 kΩ Task 2 I REF = 1 2 k n ( V GS 1 − V tn ) 2

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Moses Tonade Lab 6 Report Using this equation and the same values from before we find V GS1 = 1.79V. Also, R 1 was found to be 1.2MΩ and R 2 is equal to 270 kΩ. Task 3 R 1 measured = 1.2MΩ R 2 measured = R 2 + Potentiometer = 345kΩ, V O measured = 5V V GS1 measured = 1.68V V SG3 measured = 1.84V I D1 = 100 μA Task 4 g m = 2 √ k n I D ( 1 + λV DS ) Using this equation and replacing k n = 0.329 mA/V 2 , I D = 100μA, λ = 0.016V -1 & V DS = 5V, then g m = 422  A/V R in = 200kΩ R out = 2MΩ A V = V o V i =− g m R out A V = -72.8 theoretical A V = -82.5 experimental

Moses Tonade Lab 6 Report Task 5 R in = 99.5 Ω R out = 500Ω A V =( g m + g mb + 1 2 ) R out A v = 419 V/V theoretical A V = 42 V/V experimental Task 6

Moses Tonade Lab 6 Report X = 0.25 g mb = X*g m g mb = 0.00042 Task 7 Multisim

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Moses Tonade Lab 6 Report In the previous figure showing the Multisim circuit for figure 3 on the lab handout shows the theoretical layout for the transistor circuit. The gain on this circuit was found to be -211.5 V/V Discussion The reasoning behind task 7 circuit is to show a common gate amplifier, we see the body effect enhance the small signal voltage gain which is directly related to the parameter. This was the output voltage was proportional to the nMOS transconductance as previously stated. The theoretical values in this experimental lab were much higher than calculated in physical lab. This could be because of the incorrect parameters set in different tasks because the difference was so great by a factor of about 10 sometimes. If our R out was incorrect, then the whole gain would have been completely off. Our measurement compared to the simulated values by representing that we knew what kind of amplifier they were because the values were not so close at all. But we did, however, get it within the correct ballpark of negative or positive and high or low. We had high error for every calculation except for the gain in the first circuit. Our error percentages ranged from 10% to 99% and the causes behind this could range anywhere from incorrect circuit on our board, to incorrect parameters, to also incorrect placement of probes. Summary In conclusion, the nMOS amplifier is what had our main concern to understand with active loads. We got to see different kinds such as common source as compared to common gate. Along with that we got to