Lab report 3 Elec 2607

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Carleton University *

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2607

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Electrical Engineering

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Apr 3, 2024

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Lab 3 ELEC2607 Jeff Hansen 101197428 Lab Section: L3 (8:30 - 11:30AM)

1.0 Introduction The focus of this laboratory was to mimic the T-bird tail-light control design using a complex programmable logic device (CPLD). The completed circuit’s function was to output different types of combinations for the T-bird tail-lights, with different input signals providing different output combinations. The circuit was made from a left, right and brake signal functions, with the three functions acting as switches to generate 8 possible output patterns which will be discussed in further sections. The possible states for the right tail-light was 000 -> 100 -> 110 -> 111, the possible states for the left tail light were 000 -> 001 -> 011 -> 111, for a total of 8 possible output patterns. An application to this specific would only work for the tail lights of cars, outside of that the 3 circuits that make up this design are quite useful in a lot of applications, like timers, handheld devices, GPU’s for computers etc. The design was made using the Xilinx software and tested in the ModelSim program. For the testing portion of this lab, a completed circuit with the 3 components was needed, it was then passed into ModelSim which showed the student waveforms which could be interpreted to see if the circuit was made correctly. The rest of this report will contain the specifications and requirements of the circuit, the process and design, testing and implementation and lastly the conclusion. 2.0 Specifications The main components of the T-bird counter that were designed in this lab were the left control box, the right control box and a counter, the three were then connected together to make the functional circuit. For both the control boxes there were 4 inputs: left (L), right (R), Brake (B), and Reset (R). Then the outputs were 3 lights: LITE_1, LITE_2, LITE_3. Both of the control boxes were quite similar, except for one having one of the inputs inverted. The counter circuit consisted of three inputs: clock (CLK), reset (RST) and signal storing memory (D). The inputs were then sent to 4 outputs LITE_1, LITE_2, LITE_3 and Emerg. The counter itself was made out of a D-flip-flop which was created in the prelab question 1, and it had a reset input, which automatically made Q equal to zero, allowing the user to store the inputs as memory. Since the circuit was made in Xilinx there were almost no limitations to the gate types or amount of gates that could be used. There is no power or time limit, the circuit is quite small so supplying sufficient power is not difficult, there is also no time limit however, if the switches are not pressed the circuit will not activate.

3.0 Design 3.1 Divide by two circuit The first component which needed to be built was the divide by two circuit, the divide by two circuit is a d-flip-flop. The input Clock signal was passed through this circuit and was divided by 2, to output the frequency over every 2nd rising clock edge. The following figure shows both the divide by two and the d flip-flop circuits. Figure 1 showing the divide by two circuit made in pre-lab question 1. 3.2 Counter circuit The next circuit that was needed to be built was the counter circuit, the counter circuit has 2 inputs clock and reset, which are sent into the d flip-flop indicated as D on the circuit which inverts the outputs and sends it back through again. The counter circuit has 4 outputs: LITE_1, LITE_2, LITE_3 and Emerg, these outputs are activated by taking the Q0 output which was previously inverted, and everytime the signal is passed through the d-flip-flop the outputs change, resulting in different tail-lights being activated. The next figure demonstrates the completed counter circuit which was completed during the lab.

Figure 2 showing the completed counter circuit created in the lab. The circuit was derived from the equations obtained from the truth table during the pre-lab; the following figure shows the completed truth table. Figure 3 showing the completed truth table created in the pre-lab using table 1. After completing the truth table the equations for the circuit were derived and were used to build the completed circuit, the following figure 4 shows the equations obtained. Figure 4 showing the equations derived from the truth table made in the pre-lab. 3.3 Left control box

The next part of the circuit was to build the left and right control boxes. The left control box was made by deriving equations from a truth table. The left control box takes 4 inputs which are Left turn (L), Right turn (R), Brake (B) and Emergency lights (Emerg). Then outputs them in different combinations producing the outputs 000 -> 001 -> 011 -> 111. The following is a truth table from which the equations were derived. Figure 5 showing the truth table for the left side The equations obtained from the truth table are shown down below in figure 6 Figure 6 showing the equations derived from the truth table After these equations were obtained they had to be simplified in order for the circuit not to consist of too many logic gates. To do this a karnaugh map was used to simplify the equations, the next figure 7 shows the karnaugh map and the simplified equations obtained.

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