1. Design a sequence detector that detects the pattern "1101" in a sequence of binary input x. The output z goes to '1' when the last '1' in the pattern is input. z is 'O' otherwise. The last '1' in a pattern can be considered as the first '1' in the next pattern. Answer: ① 0/0 0/0 10 1/0 % 0/0 State & output table Current next state output State X=0 x=1 X=0 x=1 So So S₁ 0 0 S₁ So で 0 52 S3 52 53 So ~ 5 D 0 State assignment: So~ AB=00 transition & output table x other state assignments S₁~ AB = 01 are ok too 52 ~ AB = 10 53 ~ AB = 11 AB 4*B* z X=0 x=1 X=0 x=1 00 00 01 อ ○ อ 1 ა 10 10 || 10 11 00 01 อ Z= ABX use DFF for the design ce* =D D₁ = A* DB = B* AB AB 0001 0001 10 1110 0 0 0 0 0 0 01 1 О 0 cuk DA=AB+ABX PB = ABAX A B е DB

1. An arithmetic system operates with 3-digit decimal numbers with sign presented in BCD (12 bits), negative numbers utilize the 10's complement form, one decimal digit (4 bits) is occupied by sign: 0 for "+" and 9 for "-". 1a) Show the most positive and the most negative numbers in both decimal and BCD forms. 1b) Present numbers A=+36 and B= -42 in BCD. 1c) Present the 10's complements of A and B in BCD. 1d) Perform the following operations bit-by-bit, show carries, apply BCD correction (add 6) when necessary (the sum of two decimal digits is greater than 9). 1d1) A+B in BCD. 1d2) A - B = A+(-B) in BCD by addition of A and the 10's complement of B. 1d3) B-A= B + (-A) in BCD by addition of B and the 10's complement of A.

QUESTION 1 You have used DEBUG to unassemble the following instructions. -U 0100 0108 1369:0100 B84365 MOV AX, 6543 1369:0103 BB3394 MOV BX, 9433 1369:0106 F7E3 DEC BX 1369:0108 CD21 INT 21 The last byte of the instruction loaded at address 0106 is stored in address. 0100 0106 0107 0108

Question 4) which data shift register does each of the following illustration represent?

H.W :- 1) A four logic-signal A,B,C,D are being used to represent a 4-bit binary number with A as the LSB and D as the MSB. The binary inputs are fed to a logic circuit that produces a logic 1 (HIGH) output only when the binary number is greater than 01102-610. Design this circuit. 2) repeat problem 1 for the output will be 0 (LOW) when the binary input is less than 01112-710- Saleem Lateef

5. Convert the following unsigned numbers from their initial radix into the other two common radices. (binary, hex, decimal) a. Ob10010011 b. 63 C. 0 d. 39 e. 437 f. 0x0123

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If a DIP switch with 8 switches (0-7) lines up with bit0-7 of the data bus, and switches 1,2,4,5 & 7 are set,  what value is read into the AL register (a) 6D (b) D6 (c) 6B (d) B6

QO dddd Q1 clock Given: • Counter starts at decimal 9 when Q viewed as a 4-bit unsigned number (Q3 most significant bit) What is the decimal value of Q (viewed as a 4-bit unsigned number) after four more clock “ticks"? Answer

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