3) Create a command file that maps any 8 frames of physical memory to the first 8 pages of virtual memory, and then reads from one virtual memory address on each of the 64 virtual pages. Step through the simulator one operation at a time and see if you can predict which virtual memory addresses cause page faults. Explain all the activities.
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- What is the purpose of the trampoline page? Why do both kernel address space and user process address space map the trampoline page to the same virtual address?Would you agree that suspended processes will always hold a zero (0) value for both read and write I/O operations? Is the number of threads directly proportional to the number of bytes written by the process in I/O operation?Which is wrong about virtual memory: o Swapping when there is no hit in main memory o A page fault occurs when there is no hit in main memory o Virtual address mapped into actual address by mapper O All are not correct
- Assume that you are now in possession of two SS CPUs. What is the total number of cycles that will be required for these two threads to finish executing? How much of the available issue slots are lost due to the presence of hazards?Answer the following:I. Name any two interrupt/exceptions that can occur during IF and ID stagesII. Contrast superscalar and superpipelined modes of ILPIII. What is the role of write back buffers in write-through and write-back cachesIV. What is the impact of prefetcher on the different kinds of cache missesV. Illustrate why and what kind of hazards are addressed/not-addressed by registerrenamingWhich of the following is correct regarding Memory-Mapped I/O? Select one: a. Memory-Mapped I/O is more complex and inflexible in handling I/O operations. b. The same memory reference instructions (read/write) can be used for I/O transfers. c. There are separate input and output instructions to handle I/O data transfers. d. There is a separate memory and I/O address space. O e. The available memory address space is larger when using Memory-Mapped I/O.
- Which of the following factors does NOT cause the address (virtual or physical) of a specific variable to change? Select one: a. Page cache b. Writing a '3' to /proc/sys/vm/drop_caches c. Various factors in the kernel such as memory usage of other processes d. ASLR (Address space layout randomization)Which of following is not true for virtual memory? a)In page table of virtual memory, if valid-invalid bit is invalid, then whether the page is in secondary storage or page is not in logical address space of that process b)A page fault occurs when a virtual adress that is referenced is not already loaded into physical address c)A program must be loaded to physical memory (RAM) completely for it to be executed d)Virtual memory makes it possible to execute programs that are larger than physical memory(RAM).a. Can a process make transition from Ready state to Blocked state? Why orwhy not?b. Which scheduler must work very fast in order not to waste significantCPU time? Which can be slowc. What are the advantages of multiprogramming over non-multiprogramming systems?d. Is there any protection between threads of a process?e. How threads are more efficient in multiprocessor system?f. What is the advantage of thread switching over process switching? Why?g. What is the advantage of implementing threads in the kernel?h. When are counting semaphores used?i. What is the difference between multiprogramming and multiprocessing?j. When should a user use time-sharing system than personal computer orsingle-user?
- Assume you now have two SS CPUs. How many cycles will it take for these two threads to execute? How many issue slots are squandered as a result of hazards?This is because, as the name implies, it is able to use Direct Memory Access (DMA) to increase the system's capacity to manage several threads at once.How does this hamper attempts to create new hardware?Imagine that to save space, the TLB drops the Read/Write and User/Supervisor protection bits. The page table still has the protection bits. However, when moving from user mode to kernel mode (or vice versa), the TLB is flushed. i) Could a process access memory belonging to another process? How? ii) Could a process access memory belonging to the kernel? How? iii) What problem could arise if a process can write memory it is normally supposed to only read?