Annotate the following MIPS instructions to indicate source registersand destination registers. A source register is read during the instruction'sexecution, while a destination register is written during the instruction's execution.1. add $s1, $t2, $t32. lw $s3, 8($gp)3. sw $s4, 12($s5)4. addi $s1, $zero, 1005. bne $t1, $t2, else6. add $s1, $s1, $s1

Annotate the following MIPS instructions to indicate source registersand destination registers. A source register is read during the instruction'sexecution, while a destination register is written during the instruction's execution.1. add $s1, $t2, $t32. lw $s3, 8($gp)3. sw $s4, 12($s5)4. addi $s1, $zero, 1005. bne $t1, $t2, else6. add $s1, $s1, $s1

Systems Architecture

7th Edition

ISBN:9781305080195

Author:Stephen D. Burd

Publisher:Stephen D. Burd

Chapter4: Processor Technology And Architecture

Section: Chapter Questions

Problem 15VE: A(n) ________________ instruction always alters the instruction execution sequence. A(n)...

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