Comptia A+ Core 1 Exam: Guide To Computing Infrastructure (mindtap Course List)
10th Edition
ISBN: 9780357108376
Author: Jean Andrews, Joy Dark, Jill West
Publisher: Cengage Learning
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Chapter 3, Problem 14TC
THINKING CRITICALLY
Which is faster, CL3 memory or CL5 memory?
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Which kind of bus between the central processing unit and the RAM should we use? Surely the best performing one wins, right? When thinking about it, why did you choose to do that?
Which kind of bus between the central processing unit and the RAM should we use? Which one has the most impact? Let me know why you made this choice.
Which bus—synchronous or asynchronous—should we use to link the CPU to the memory? What works better? Give a justification for your decision.
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Comptia A+ Core 1 Exam: Guide To Computing Infrastructure (mindtap Course List)
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- Which kind of bus—asynchronous or synchronous—should we employ to connect the CPU and the memory? Please explain the thought process that led you to this conclusion.arrow_forwardWhich kind of bus should we use to connect the central processing unit and the RAM: synchronous or asynchronous? Which of these is the most efficient? Justify your choice, if you like.arrow_forwardWhich do you prefer, an asynchronous or synchronous bus, and why in terms of CPU and memory usage?Is there such a thing as a bus that runs 24/7? Explain.arrow_forward
- Which is preferable, a synchronous or asynchronous bus between the CPU and the memory? Thanks. Describe the reasoning behind your decision.arrow_forwardWhich bus should we utilize between the CPU and memory: an asynchronous or synchronous one? If so, why is it so popular? You made that choice for a reason.arrow_forwardWhich is better for linking the central processing unit to the RAM? Thanks. Just how did you end up deciding this?arrow_forward
- What is direct memory access (DMA)? Why is it used? How can a programmer use DMA? (short answer is ok)arrow_forwardShould the bus between the CPU and RAM be synchronised or not? Which is better? Explain your pick.arrow_forwardShould we utilise a different kind of bus to connect the CPU and the RAM? What's the best way to spend our time? I’m curious as to the reasoning behind that choice.arrow_forward
- How does the concept of M.2 slots relate to storage on modern motherboards, and how do they impact system performance?arrow_forwardmemory addresses are two different Instead of putting the whole data in memory, use memory as a placeholder to register some of the data with ALU and move the rest to IR?explain ?arrow_forwardFor the 8051 family of microcontrollers:i) Draw a representative memory map and explain how part of the data memory isable to share the same address space as the Special Function Registers in thecase of the 8052. ii) When an 8051 device is switched on, which memory bank is active? Explain howyou can switch to memory bank 1? iii) Explain why you should be very careful if you use a memory bank other thanmemory bank 0 if also using push and pop instructions. How can this issue beavoided?arrow_forward
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