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MindTap Engineering for Glover/Overbye/Sarma's Power System Analysis and Design, 6th Edition, [Instant Access], 1 term (6 months)
6th Edition
ISBN: 9781305636309
Author: J. Duncan Glover; Thomas Overbye; Mulukutla S. Sarma
Publisher: Cengage Learning US
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Chapter 8, Problem 8.16MCQ
For a balanced-Y impedance load with per-phase impedance of
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4- The data sheet of a quad two-input NAND gate specifies the following
parameters: IoH (max.)=0.4 mA, VOH (min.) =2.7 V, VIH (min.) =2V, VIL
(max.)=0.8 V, VOL (max.)=0.4 V, IOL (max.)=8 mA, IL (max.)=0.4 mA, IH
(max.)=20µA, ICCH (max.)=1.6 mA, ICCL (max.)=4.4 mA, tpLH =tpHL=15 ns
and a supply voltage range of 5 V. Determine
(a) The average power dissipation of a single NAND gate,
(b) The maximum average propagation delay of a single gate,
(c) The HIGH-state noise margin and (d) the LOW-state noise margin
For the given Full-Wave Bridge Rectifier circuit below with capacitor filter, it produces a ripple voltage waveform shown. If V2 is given
as 18 volts and V1 is given as 6 volts, compute for the ripple peak-to-peak voltage, dc voltage and ripple factor. If the load resistance
has a value of 2 kiloohms, how much should be the dc current?. compute for the peak output voltage at the output of the rectifier. If
silicon diodes are used, what is the value of the secondary peak voltage?. If N1 is given as 1400 and N2 is given as 600, compute for
the primary peak voltage.
D1
D2
D3
D4
v(Volts)
v2
(seconds)
The input of an IC requires a constant 5 V, but the supply voltage is 9 V. Use thevoltage divider equations to create a voltage divider with an output of 5 V. Assumethe IC has such a high input resistance (10 MΩ) that it practically draws nocurrent from the divider.
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