Lab3_ Bridge Rectifier

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Toronto Metropolitan University *

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404

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Electrical Engineering

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Apr 3, 2024

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Course Title: Electronic Circuits I Course Number: ELE 404 Semester/Year W2024 Instructor: Prof. Fei Yuan Assignment/ Lab Number: Lab 3 Assignment/Lab Title: Bridge Rectifier Submission Date: Feb. 18, 2024 Due Date: Feb. 18, 2024 Student LAST Name Student FIRST Name Student Number Section Signature* El-Hage Ali 501167729 12 Pope Justin 501153591 12
Lab Report (Bridge Rectifier) By: Justin Pope & Ali El-Hage Date of Preparation: February 07, 2024 Table of Contents 1. Introduction…………..…………..………… .... …………..…………..……R2 2. Objectives..…………..…………..…………..…………..…………..………R2 3. Circuit Under Test..…………..…………..…………..…………..…………R2 4. Experimental Results..…………..………..…………..…………..……...…R3 5. Conclusions and Remarks..………….………..…………..…………..……R4 6. Appendix: Pre-Lab and TA Copy of Results……………………………...R8 Page R1
1. Introduction The Bridge Rectifier Lab 3 report is presented below. The experiments were conducted on Wednesday, February 07, 2024. The pre-lab report and the TA copy of the experimental results are placed at the end of the report as an Appendix. 2. Objectives The objective of the lab is to understand the properties of a diode and how diodes allow current to follow in one direction. The properties of a diode are used to convert AC to DC in circuits which are known as rectifiers. We will be experimenting with one of the rectifiers called a Bridge Rectifier to understand how this conversion between AC and DC occurs. 3. Circuit Under Test Figure 1 shows the schematic of the first circuit constructed. V S is the signal generator connected to a bridge rectifier and a 1kΩ resistor across the output terminals. Figure 1. Bridge rectifier in which the circuit ground is shorted to the negative terminal of the source. Figure 2 shows the schematic of the second circuit constructed. V S is the signal generator connected to a bridge rectifier and a 5.6kΩ resistor is connected in parallel to a 1µF polyester capacitor across the output terminals. Figure 2. Bridge rectifier with smoothing capacitor Page R2
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Figure 3 (a) and (b) shows a screenshot of the Multisim software environment, the same setup used for the circuits in the lab experimentation. (a) (b) Figure 3. (a) Bridge rectifier in which the circuit ground is shorted to the negative terminal of the source and (b) Bridge rectifier with smoothing capacitor. 4. Experimental Results In the lab, we were monitoring how the output voltage V o of the bridge rectifier will look like. We first get our input voltage V i and our output voltage V o by ensuring we connected the corresponding channels to the correct locations. Now to differentially monitor V o , we must subtract the output voltage signal from the input voltage. After monitoring the output voltage, we connected a 1µF capacitor to the circuit near the output voltage node. We followed the same procedure in order to differentially monitor the output voltage. We then measured the voltage across the capacitor and the voltage across the load resistor. Page R3
Graph E1. Output voltage waveform of the bridge rectifier of Figure 1 , with 1N4148 diodes and R L = 1kΩ. Graph E2. Output voltage waveform of the bridge rectifier with smoothing capacitor of Figure 2. With R int = 50Ω and R L = 5.6kΩ. Table E3. DC output voltage and peak-to-peak ripple v O [V] V r [V] 5.354 1.29 Page R4
Graph E3. DC output voltage and peak-to-peak ripple 5. Conclusions and Remarks This section answers the questions raised in the lab manual. The questions have been repeated in italic bold font, for the ease of reference. C1. Which set of waveforms in Step P2 (i.e., Graph P2(a) or Graph P2(b)) better agree with the manually-derived transfer characteristic of Graph P1 and why? What is the most consequential source of disagreement in this specific case? What are the sources of error, in general? Graph P2(a) and Graph P2(b) are nearly identical to one another. It proves that the change in the load resistance does not impact the transfer characteristic of Graph P1 . The sources for minor errors/deviations would be due to their difference tolerances. These small discrepancies may result in small differences in the graphs relating to one another, however, both agree with the transfer character. Page R5
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C2. Draw two equivalent circuits for the bridge rectifier of Figure 2: one for 𝑣𝑆 > 0.7 𝑉 and the other one for 𝑣𝑆 < −0.7 𝑉 . Thus, replace the on diodes with a 0.7- 𝑉 battery, and the off diodes with an open link. Based on the two equivalent circuits, derive expressions for the current of diode 𝐷 4, corresponding to each of the two aforementioned input voltage conditions. Then, check your expressions by your simulated waveforms of Graph P3, and comment. Based on your analysis and simulation results, comment of the effect of the short link between the ground of the circuit and the negative terminal of the source, in the bridge rectifier. What would happen if the source could supply a lot of current? Equivalent Circuits: Circuit 1: D1 and D2 On, V S > 0.7V Circuit 2: D3 and D4 On, V S < 0.7V For Circuit 1, D4 is off, therefore, its an open circuit and I D4 = 0A For Circuit 2, D4 is on, since all of the components are in series, using KCL: 𝐼 𝐷4 = 𝑉 ? −𝑉 𝐷4 ? 𝑖𝑛𝑡 From Graph P3 , these findings make sense. When V S is greater than 0.7V, D4 is on, thus we get a current. The points in which there is no current is when V S is less than 0.7V, when D4 is off. This pattern continues, observed in Graph P3 . The effect of the short link between the ground of the circuit and the negative terminal of the source provides a reference point in which the voltage output measurements remain stable. This ensures that all voltage measurements are with respect to the same reference node, allowing our data to be taken more accurately. If the source could supply a lot of current, then this could result in an overload of the components if they are exceeding their maximum threshold voltage. We may also experience a voltage drop across the elements, causing distortions in the output voltage. Page R6
C3. In Step E1 you took note of the blinking pattern and frequencies of the LEDs. What did the pattern represent? How was the blinking frequency of the green LED related to that of the red LEDs? Explain the reason. The LEDs are considered diodes. Diodes require a potential difference greater than 0.7V to turn on. Similarly, the blinking frequency represented the diode turning on and off as a result of the AC signal generator, with a peak-to-peak of 16V. When the voltage was greater than 0.7V, the LEDs were on, and off when the voltage across them was less than 0.7V. In relation to C2. we would find that each pair takes turns blinking. When D1 and D2 are on, D3 and D4 are off, and vice versa. The green LED however, blinks in sync with each cycle of the AC signal because current is always passing through the load. C4. Comment on the agreement between Graph P2(a) and Graph E2. Comment on discrepancies, if any. The comparison between Graph P2(a) and Graph E2 would be that there is a major difference between the two graphs. Graph P2(a) we can see that the graph had smooth peaks and troughs whereas in Graph E2 , we can see that the waves did not come out as planned and were in shaky lines. This is due to the fact that there could have been human error when completing the circuit to try to resemble the Graph E2 to look like Graph P2(a) but did not happen successfully. Although they are different, we can see some similarities between the two. C5. Comment on the agreement between Graph P4(a) and Graph E3. Also, compare Table P4 (calculated DC and ripple voltage values) with Table E3 (measured DC and ripple voltage values). Comment on discrepancies, if any. Graph P4(a) and Graph E3 both exhibited the same same behavior with approximately the same V o and V r . There are differences between the two graphs but this is due to the uncertainties of both the signal generator and the resistors used. In Tables P4 and Table E3 , when comparing the value for the output voltage compared to the theoretical value of the output voltage, it had a 12% percentage error. The voltage across the resistance had a 42% difference. These percentage errors are the result of the resistors used as they all have certain tolerances and the uncertainty of the signal generator. Page R7
C6. Based on the results of Step P4, comment on the effect of load on the resemblance of the (actual) output voltage of a bridge rectifier to a perfect DC waveform. Comment on the value of each of the three loads, in view of the capacitance of the smoothing capacitor and half-period of the source voltage, and based on that justify the corresponding output voltage waveforms. The load that is connected to the bridge rectifier affects the resemblance of the output voltage to a perfect DC (Direct Current) waveform. In the bridge rectifier, the output voltage is obtained from the rectification of the AC source (Alternating current). The rectified output waveform contains ripples due to the periodic charging and discharging from the smoothing capacitor. For a resistive load, this load consumes power across the entire AC cycle and the smoothing capacitor reduces the ripple amplitude resulting in a steady and constant output voltage. For a capacitive load, if the load is greater than the smoothing capacitor, the voltage across the load tends to lag behind the voltage across the capacitor. Which would then cause a distortion between the interaction of both capacitors. With this in mind, the output waveform will have a phase shift. For an inductive load, current lags voltage in an inductive circuit. The lagging current will cause an increase in ripple and distortion in the output voltage waveform. If we were to have a larger smoothing capacitor, it would reduce the ripple voltage and improve the resemblance of the waveform to a perfect DC Waveform. The half period of the source voltage determines the frequency at which the capacitor charges and discharges. The shorter the half period, the faster the charging and discharging which will then help the smoothing capacitor reduce ripple. 6. Appendix: Pre-Lab and TA Copy of Results Page R8
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Lab 3: Bridge Rectifier By: Justin Pope Date of Preparation: February 01, 2024 P1: Simulation of the Circuit of Figure 1 using Multisim Figure 1. Bridge rectifier with a resistive load. Graph P1. Transfer characteristic of the bridge rectifier of Figure 1 . Bridge Rectifier Pre-Lab 1
Lab 3: Bridge Rectifier By: Justin Pope Date of Preparation: February 01, 2024 Graph P2(a). Source, input, and output voltage waveforms of the bridge rectifier of Figure 1 , with 1N4148 diodes and R L = 1kΩ. Bridge Rectifier Pre-Lab 2
Lab 3: Bridge Rectifier By: Justin Pope Date of Preparation: February 01, 2024 Graph P2(b). Source, input, and output voltage waveforms of the bridge rectifier of Figure 1 , with 1N4148 diodes and R L = 270Ω. Bridge Rectifier Pre-Lab 3
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Lab 3: Bridge Rectifier By: Justin Pope Date of Preparation: February 01, 2024 P3: Simulation of the Circuit of Figure 2 using Multisim Figure 2. Bridge rectifier in which the circuit ground is shorted to the negative terminal of the source. Bridge Rectifier Pre-Lab 4
Lab 3: Bridge Rectifier By: Justin Pope Date of Preparation: February 01, 2024 Graph P3(a) Waveforms of v I , v O , I D4 in the circuit of Figure 2 . Bridge Rectifier Pre-Lab 5
Lab 3: Bridge Rectifier By: Justin Pope Date of Preparation: February 01, 2024 P4: Simulation of the Circuit of Figure 3 using Multisim Figure 3. Bridge rectifier with smoothing capacitor 𝐹𝑖?𝑑 𝑉 𝑟 𝑉 ? = 8𝑉 𝑉 ?? = 2𝑉 ? π = 5. 09𝑉 𝑉 𝑟 = 𝑉 ?? 2𝑓𝑅? = 5.09 (2)(500)(5600)(1×10 −6 ) = 0. 910𝑉 𝐹𝑖?𝑑 𝑉 ? 𝑉 ?,?𝑎𝑥 = 8 − 2(0. 7) = 6. 6𝑉 𝑉 ?,?𝑖? = 𝑉 ?,?𝑎𝑥 − 𝑉 𝑟 = 5. 69𝑉 𝑣 ? = 6.6+5.69 2 = 6. 14𝑉 Table P4. DC output voltage and peak-to-peak ripple v o [V] v r [V] 6.14 0.910V Bridge Rectifier Pre-Lab 6
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Lab 3: Bridge Rectifier By: Justin Pope Date of Preparation: February 01, 2024 Graph P4(a). Source, input, and output voltage waveforms of the bridge rectifier with smoothing capacitor of Figure 3 , R int = 50Ω and R L = 5.6kΩ. Bridge Rectifier Pre-Lab 7
Lab 3: Bridge Rectifier By: Justin Pope Date of Preparation: February 01, 2024 Graph P4(b). Source, input, and output voltage waveforms of the bridge rectifier with smoothing capacitor of Figure 3 , R int = 50Ω and R L = 56kΩ Bridge Rectifier Pre-Lab 8
Lab 3: Bridge Rectifier By: Justin Pope Date of Preparation: February 01, 2024 Graph P4(c). Source, input, and output voltage waveforms of the bridge rectifier with smoothing capacitor of Figure 3 , R int = 50Ω and R L = 560Ω Bridge Rectifier Pre-Lab 9
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Page R9