Lab3_ Bridge Rectifier

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Toronto Metropolitan University *

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404

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Electrical Engineering

Date

Apr 3, 2024

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pdf

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19

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Course Title: Electronic Circuits I Course Number: ELE 404 Semester/Year W2024 Instructor: Prof. Fei Yuan Assignment/ Lab Number: Lab 3 Assignment/Lab Title: Bridge Rectifier Submission Date: Feb. 18, 2024 Due Date: Feb. 18, 2024 Student LAST Name Student FIRST Name Student Number Section Signature* El-Hage Ali 501167729 12 Pope Justin 501153591 12
Lab Report (Bridge Rectifier) By: Justin Pope & Ali El-Hage Date of Preparation: February 07, 2024 Table of Contents 1. Introduction…………..…………..………… .... …………..…………..……R2 2. Objectives..…………..…………..…………..…………..…………..………R2 3. Circuit Under Test..…………..…………..…………..…………..…………R2 4. Experimental Results..…………..………..…………..…………..……...…R3 5. Conclusions and Remarks..………….………..…………..…………..……R4 6. Appendix: Pre-Lab and TA Copy of Results……………………………...R8 Page R1
1. Introduction The Bridge Rectifier Lab 3 report is presented below. The experiments were conducted on Wednesday, February 07, 2024. The pre-lab report and the TA copy of the experimental results are placed at the end of the report as an Appendix. 2. Objectives The objective of the lab is to understand the properties of a diode and how diodes allow current to follow in one direction. The properties of a diode are used to convert AC to DC in circuits which are known as rectifiers. We will be experimenting with one of the rectifiers called a Bridge Rectifier to understand how this conversion between AC and DC occurs. 3. Circuit Under Test Figure 1 shows the schematic of the first circuit constructed. V S is the signal generator connected to a bridge rectifier and a 1kΩ resistor across the output terminals. Figure 1. Bridge rectifier in which the circuit ground is shorted to the negative terminal of the source. Figure 2 shows the schematic of the second circuit constructed. V S is the signal generator connected to a bridge rectifier and a 5.6kΩ resistor is connected in parallel to a 1µF polyester capacitor across the output terminals. Figure 2. Bridge rectifier with smoothing capacitor Page R2
Figure 3 (a) and (b) shows a screenshot of the Multisim software environment, the same setup used for the circuits in the lab experimentation. (a) (b) Figure 3. (a) Bridge rectifier in which the circuit ground is shorted to the negative terminal of the source and (b) Bridge rectifier with smoothing capacitor. 4. Experimental Results In the lab, we were monitoring how the output voltage V o of the bridge rectifier will look like. We first get our input voltage V i and our output voltage V o by ensuring we connected the corresponding channels to the correct locations. Now to differentially monitor V o , we must subtract the output voltage signal from the input voltage. After monitoring the output voltage, we connected a 1µF capacitor to the circuit near the output voltage node. We followed the same procedure in order to differentially monitor the output voltage. We then measured the voltage across the capacitor and the voltage across the load resistor. Page R3
Graph E1. Output voltage waveform of the bridge rectifier of Figure 1 , with 1N4148 diodes and R L = 1kΩ. Graph E2. Output voltage waveform of the bridge rectifier with smoothing capacitor of Figure 2. With R int = 50Ω and R L = 5.6kΩ. Table E3. DC output voltage and peak-to-peak ripple v O [V] V r [V] 5.354 1.29 Page R4
Graph E3. DC output voltage and peak-to-peak ripple 5. Conclusions and Remarks This section answers the questions raised in the lab manual. The questions have been repeated in italic bold font, for the ease of reference. C1. Which set of waveforms in Step P2 (i.e., Graph P2(a) or Graph P2(b)) better agree with the manually-derived transfer characteristic of Graph P1 and why? What is the most consequential source of disagreement in this specific case? What are the sources of error, in general? Graph P2(a) and Graph P2(b) are nearly identical to one another. It proves that the change in the load resistance does not impact the transfer characteristic of Graph P1 . The sources for minor errors/deviations would be due to their difference tolerances. These small discrepancies may result in small differences in the graphs relating to one another, however, both agree with the transfer character. Page R5
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