EE302 Lab 8 Buck Converter

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University of Texas *

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302

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Electrical Engineering

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Jan 9, 2024

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EE302 Lab 8: Buck Converter Final Project Obtain: Download Libraries.zip from Canvas or Discord Motivation: The final project for EE 302 will be to build a power converter, i.e. an electrical circuit that can provide a desired voltage to a load while receiving a different voltage from a power source. (An example would be a circuit that converts the 110 Vrms sinusoidal voltage of the grid to the 19 Vdc that is compatible to input to your laptop). In particular, we will build a buck converter, which produces a lower output voltage than its input voltage. We already know some ways to reduce voltages (resistor dividers; certain amplifier configurations), but these are all lossy circuits, meaning that they dissipate power. Power converters, by contrast, are theoretically 100% efficient and, in practice, regularly achieve efficiencies of 90+%. Lab: 1. Recreate the circuit below in the KiCad schematic editor (for components not natively in KiCad, see step 2):

2. You will need some components that are not natively in KiCad. Follow the following instructions to import them: a. Download and extract the files into a directory of your choice. b. Open KiCad, go to Schematic Editor and click on Preferences > Manage Symbol Libraries. Make sure you are on the "Global Libraries" tab. Browse to the bottom of the table, then click on the “+” icon followed by the “folder” icon. Browse to the location of “BuckParts.kicad_sym” and click “OK” c. Go to PCB Editor and click on Preferences > Manage Footprint Libraries. Make sure you are on the "Global Libraries" tab. Browse to the bottom of the table, then click on the “+” icon followed by the “folder” icon. Browse to the location of “BuckParts.pretty” and click “OK” (Note that symbol libraries like BuckParts.kicad_sym are files , while footprint libraries are folders such as BuckParts.pretty) OR d. If you would like to use the default KiCad directory and have these libraries available for all your projects, then first navigate to the default location for KiCad symbols (which should be something like C:\Program Files\KiCad\share\kicad) e. Go into the "symbols" directory and paste "BuckParts.kicad_sym" there f. Go into "footprints" directory and paste "BuckParts.pretty" there

3. Associate the each component with a footprint according to the following chart: R (except current sense resistor R1) Resistor_THT:R_Axial_DIN0207_L6.3mm_D2.5mm_P10.16mm_Horizontal R1 (current sense resistor) Resistor_THT:R_Axial_DIN0922_L20.0mm_D9.0mm_P30.48mm_Horizontal Capacitors Capacitor_THT:C_Disc_D3.8mm_W2.6mm_P2.50mm Terminal Blocks Connector_Phoenix_MSTB:PhoenixContact_MSTBA_2,5_2-G_1x02_P5.00mm_Horizontal Test Points TestPoint:TestPoint_Keystone_5010-5014_Multipurpose Coaxial Connector Connector_Coaxial:BNC_Amphenol_B6252HB-NPP3G-50_Horizontal MOSFET Package_TO_SOT_THT:TO-220-3_Vertical L SamacSys_Parts:7447231101 (imported) TPS2832D Gate Driver Package_SO:SO-8_3.9x4.9mm_P1.27mm TLV2372 Dual Op Amp Package_SO:SO-8_3.9x4.9mm_P1.27mm 4. Transfer your design to a PCB and begin laying out components. Please review Lab 2 to remember how to do this. As a reminder from Lab 2, there are several good recommendations and rules of thumb you might follow:  First arrange your components and imagine how the connections will be made. Only start drawing connections when you’re satisfied with the component positions.  Place connectors around the outer edge of the board, not the inner area  Place test points around the outer edge of the board, not the inner area. Space them far enough from other tall components (connectors) and each other that you can easily probe multiple test points without the probes interfering with each other  It’s usually valuable to aim for high component density. However, this only applies to the circuit itself, not to the connectors and test points! Therefore, you may end up with a dense circuit in the middle of your PCB with substantial “white space” around it. That’s okay – boards that are too small do not sit stably on the bench and make external connections more difficult.  Do not try to lay out your circuit to look like the schematic. Instead, try to lay out components in a way that makes connecting them as easy as possible. As you advance in your understanding of EE, you will make layout decisions based more and more on electromagnetic and thermal considerations than on convenience.  This board includes several capacitors, known as a “bypass capacitors.” We’ll study the purpose of this later in the course. For now, you should simply internalize the rule that every IC should have a bypass capacitor across its power pins and as close as possible to the IC . The the switching loop (the loop that involves a capacitor and the two MOSFETs) should be made as tight as possible.  Depending on the product you’re building, don’t be afraid to place components on both sides of the board. When components overlap, however, do think about how you will solder the components in – you don’t want to solder one component and cover access to another component’s pads.

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 You might choose to make the back layer a “ground plane” by placing a rectangular zone over the whole PCB. Then, any component on the back layer or any component on the front layer with through-hole pads will automatically connect to the ground plane and hence to each other.  Place four vias near the four corners of the board, with hole diameter 3.4mm. These will be useful to attach “standoffs,” metal or plastic spaces that act like legs of a table.  Use the Text function to add text labels to the silkscreen layer. This will automatically be done for component reference designators (e.g., U1), which helps you as a manufacturer. You also want labels to help you as a user. Therefore, label the test points and the connectors in a way that tells you what they are (e.g., you might add text to show you that component TP1 is measuring the signal SIG_IN).  We need to specify the edge of the PCB by drawing a graphic polygon on the Edge.Cuts layer. 5. Once the arrangement is finalized, make sure that the reference designators are not overlapping anything else. The best position for them is outside the component where they can be read before assembly and after. Nevertheless, sometimes it is good to have the reference designator “inside” the component. Either way is fine, but overlapping other lines and so forth is not good. 6. Use the Text function to add your name, the course and semester, and any other identifying information you wish to the silkscreen layer 7. ECE 302 requires a lot of resources and we are fortunate to have funding support from Texas Instruments and Wurth Electronik. It is important to recognize sponsorship when you receive it, which we will do by adding their logos to our PCBs. Download the logos below or equivalent logos from the internet. 8. We’re now going to verify that our board is constructed properly. In the top drop down menus, select Inspect > Design Rules Checker. In the pop-up window, press “Run DRC”. I get four “errors” because the mounting vias are only connected on one layer. This is okay since those vias are not for electrically connecting anything. I also get some warnings about the test points not matching the library copy. This is because I added a 3D model to my test points and is totally fine. Otherwise, your DRC should be clean. 9. Double check the following:  Mounting holes -- 3.4mm diameter (hole!) vias or cutouts at each corner with enough space from edge to accommodate spacer  Rectangular outline on the board cutout layer

 Bypass capacitor near every IC across V+ to GND  Test points, ideally for every node, decently separated from each other, ideally along outer edge of board  Several test points for ground, ideally 4+, on all 4 sides of pcb  Silkscreen labels for reference designators should be visible and easy to associate with a component, ideally even with the component installed  Silkscreen labels for test points with something human-understandable  Silkscreen name, month/year, Wurth logo, TI logo, other images you want (UTA?)  No DRC errors. Some warnings may be okay.  Double check the pinouts for ICs. Are the right functions connected to the right pins?  Double check the footprints for the ICs and other components with fixed pin pitch like capacitors. A good final board might look something like the following: 10. Prepare to order your PCB a. In the PCB editor, click File > Fabrication Outputs > Gerbers b. Make sure that the following layers are included (you may need to un-check the Paste layers): i. F.Cu ii. B.Cu iii. F.Silkscreen iv. B.Silkscreen v. F.Mask vi. B.Mask vii. Edge.cuts c. Double check part (B). In particular, DO NOT USE THE “PLOT ON ALL LAYERS” area. Your KiCad window should have layers checked on the left, NOT on the right, as in the example below:

d. Check “Do not tent vias” e. Check “Use Protel Filename Ext” f. Choose an output directory (ideally a new folder – this process will create a lot of files) g. Click “plot” – you should see a lot of “Plotted to…” messages in the output messages window h. Click “Generate Drill Files” i. In the new dialog box, ensure that the same output folder is selected j. Leave all of the defaults as they are and click “Generate Drill File” k. Locate all of the generated files (7 gerber files and one or two drill files). Select them all and compress them into a .zip file. l. Name your .zip file with your last names and your lab section. THIS IS VERY IMPORTANT – THIS THE ONLY WAY WE CAN TELL BOARDS APART AT THE ORDERING STAGE 11. Go to JLCPCB.com and login with m. Username/email = ECE302_# where (#) corresponds to your lab day: Tuesday = 1 Wednesday = 2 Thursday =3 Friday = 4 Monday = 5 (if the username does not work, try EE instead of ECE, or try ECE302_#@outlook.com) n. Password = My1stPCB (same for all) 12. Click Add Gerber File and upload your .zip file. This should take you to an ordering page 13. Choose the following o. Base material = FR-4 (default) p. Layers = 2 (default) q. Dimensions = (enter the actual dimensions of your board if they’re not detected automatically) r. PCB QTY = 5 (default) s. Product type = Industrial t. Different Design = 1

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u. Delivery Format = Single PCB v. PCB Thickness = 1.6mm (default) w. PCB Color = Choose whatever color you like! x. Leave the remainder as their defaults 14. When you are ready, click “save to cart.” Look at the cart and make sure that your order is there and that your names are present. We will take care of the actual purchasing. Do not delete your .zip file, and be sure to share the project with all project partners. PCB Files are due to be submitted to JLCPCB at 9:00p three days after your lab section. It is imperative that we order them on time so that they can be received on time for Lab 11 Tuesday Labs Due Fri Oct 20 at 9:00p Wednesday Labs Due Sat Oct 21 at 9:00p Thursday Labs Due Sun Oct 22 at 9:00p Friday Labs Due Mon Oct 23 at 9:00p Monday Labs Due Thu Oct 24 at 9:00p