Behavioural Up Counter With Max Design and implement a 8-bit resetable up count, that stops counting when max is reached. The ports are: module counter( output u8_t count, input u8_t max, input logic clk, reset); The u8_t type is defined in the test bench. count is the counter's output. The counter should increment by one for even positive edge clock until the max is reached. The counter should not increment when max is reached. The counter is reset if reset = 1 when a positive edge clock occurs. The 8-bit comparator module, cmp, must be used to check when max is reached. The test bench will set max to 150 for its testing.   Editor // include cmp module module counter( output u8_t count, input u8_t max, input logic clk, reset); logic m_test; cmp test(m_test, count, max); // complete the rest endmodule

8. A thermostat for a central air system will control both a heating and cooling system. When a target temperature is set on the thermostat by the operator, it will turn on a heat source if the measured room temperature is below that target temperature. It will also turn on a cooling source if the measured room temperature is above the target temperature. a) Please create a combination logic gate using AND, NOT and/or OR logic gates that would simulate the logic gate circuit necessary to produce the same outcome as a thermostat that controls heating and cooling devices. Be sure to properly label and explain your logic gate system. b) Please create a combination logic gate using only NOR logic gates that would simulate the logic gate circuit necessary to produce the same outcome as a thermostat that controls heating and cooling devices. Be sure to properly label and explain your logic gate system.