For a machine with 4 GB virtual memory, 1 GB physical memory, 8 KB page size, 64 KB direct-mapping L1 cache size, 32 byte line size, and 2-way associative TLB with 128 entries. a) Please draw a diagram to show the translation from a virtual address to a physical address, where you need to calculate the virtual page number size, page offset size, physical page number size. b) What would be the index and tag for TLB. c) By having TLB, how many memory accesses could be reduced as compared to those memory systems without TLB. You are required to clearly identify and explain the number of bits in each component (e.g., index, offset, tag, etc.).

Computer Networking: A Top-Down Approach (7th Edition)
7th Edition
ISBN:9780133594140
Author:James Kurose, Keith Ross
Publisher:James Kurose, Keith Ross
Chapter1: Computer Networks And The Internet
Section: Chapter Questions
Problem R1RQ: What is the difference between a host and an end system? List several different types of end...
icon
Related questions
Question
For a machine with 4 GB virtual memory, 1 GB physical memory, 8 KB page size, 64 KB direct-mapping
L1 cache size, 32 byte line size, and 2-way associative TLB with 128 entries.
a) Please draw a diagram to show the translation from a virtual address to a physical address, where
you need to calculate the virtual page number size, page offset size, physical page number size.
b) What would be the index and tag for TLB.
c) By having TLB, how many memory accesses could be reduced as compared to those memory
systems without TLB.
You are required to clearly identify and explain the number of bits in each component (e.g., index, offset,
tag, etc.).
Transcribed Image Text:For a machine with 4 GB virtual memory, 1 GB physical memory, 8 KB page size, 64 KB direct-mapping L1 cache size, 32 byte line size, and 2-way associative TLB with 128 entries. a) Please draw a diagram to show the translation from a virtual address to a physical address, where you need to calculate the virtual page number size, page offset size, physical page number size. b) What would be the index and tag for TLB. c) By having TLB, how many memory accesses could be reduced as compared to those memory systems without TLB. You are required to clearly identify and explain the number of bits in each component (e.g., index, offset, tag, etc.).
Expert Solution
trending now

Trending now

This is a popular solution!

steps

Step by step

Solved in 2 steps with 2 images

Blurred answer
Recommended textbooks for you
Computer Networking: A Top-Down Approach (7th Edi…
Computer Networking: A Top-Down Approach (7th Edi…
Computer Engineering
ISBN:
9780133594140
Author:
James Kurose, Keith Ross
Publisher:
PEARSON
Computer Organization and Design MIPS Edition, Fi…
Computer Organization and Design MIPS Edition, Fi…
Computer Engineering
ISBN:
9780124077263
Author:
David A. Patterson, John L. Hennessy
Publisher:
Elsevier Science
Network+ Guide to Networks (MindTap Course List)
Network+ Guide to Networks (MindTap Course List)
Computer Engineering
ISBN:
9781337569330
Author:
Jill West, Tamara Dean, Jean Andrews
Publisher:
Cengage Learning
Concepts of Database Management
Concepts of Database Management
Computer Engineering
ISBN:
9781337093422
Author:
Joy L. Starks, Philip J. Pratt, Mary Z. Last
Publisher:
Cengage Learning
Prelude to Programming
Prelude to Programming
Computer Engineering
ISBN:
9780133750423
Author:
VENIT, Stewart
Publisher:
Pearson Education
Sc Business Data Communications and Networking, T…
Sc Business Data Communications and Networking, T…
Computer Engineering
ISBN:
9781119368830
Author:
FITZGERALD
Publisher:
WILEY