Activities Manual for Programmable Logic Controllers
5th Edition
ISBN: 9781259679568
Author: Petruzella, Frank
Publisher: MCGRAW-HILL HIGHER EDUCATION
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Question
Chapter 7, Problem 9P
Program Plan Intro
Timer:
- Timer is mainly used to keep an output ON for a specific length of time.
- It provides a preset delay to the control actions.
- In a timer, the output will be energized when the preset value becomes equal to the accumulated value.
- Three different types of timers include a Delay-OFF, a Delay-ON, and a Delay-ON-Retentive timer.
Timer ON Delay (TON):
- TON refers to an on-delay timer.
- The on-delay timer is the most commonly used timer.
- TON counts the time-based intervals as soon as the instruction becomes true.
- Here, the output changes its state from low to high when the timer provides some time delay (instruction goes from OFF to ON state).
Explanation of Solution
b.
Given:
Consider the given conditions,
- Input = True
- EN = 1
- TT = 1
- DN = 1
Explanation:
The given program uses TON, so if the input is true, then the instruction will start to execute the program.
- The timer “T4:0” will start timing and the EN signal bits get activated.
- Next, the TT also turns into “true” until the accumulated values attains the preset value “10”...
Explanation of Solution
c.
Given:
Consider the given conditions,
- Input = False
- EN = 0
- TT = 0
- DN = 0
Explanation:
- The given program uses TON, so if the input is true, then the instruction will start to execute the program...
Explanation of Solution
d.
Given:
Consider the given conditions,
- Input = True
- EN = 1
- TT = 0
- DN = 1
Explanation:
The given program uses TON, so if the input is true, then the instruction will start to execute the program.
- The timer “T4:0” will start timing and the EN signal bits get activated...
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=
0,
Design a sequential circuit with two D flip-flops A and B, and one input x_in. When x_in
the state of the circuit remains the same. When x in = 1, the circuit goes through the state
transitions from 00 to 01, to 11, to 10, back to 00, and repeats.
Q1/ Estimate the Truth Table of the logic
circuit shown below and use it to draw the
timing diagram of the output signal X and Y
in proper relation to the inputs
A
::
Y
се
Design a sequential circuit with two T flip-flops A and B and two inputs E and F and a
reset which will satisfy the following design requirements.
If E=0, the circuit remains in the same state regardless of the value of F.
When E=1 and F=1, the circuit goes through the state transitions from 00 to 01, to 10, to
11, back to 00, and repeats.
When E=1 and F=0, the circuit goes through the state transitions from 00 to 11, to 10, to
01, back to 00, and repeats.
The results should be consistent with the simulation timing diagrams shown below.
1. Draw a state diagram for this requirement using the template below.
2. Draw a present state / next state table for this requirement using the template
below.
3. Use Karnaugh maps to determine the flip flop minimized Boolean input
expressions.
4. Model the design requirement using Verilog structural source code. Use T flip-
flops. Provide the source code.
5. Simulate the structural model using a test bench with stimulus test signals as
shown in the…
Chapter 7 Solutions
Activities Manual for Programmable Logic Controllers
Ch. 7 - Prob. 1RQCh. 7 - Prob. 2RQCh. 7 - Prob. 3RQCh. 7 - Prob. 4RQCh. 7 - a. What are the two methods commonly used to...Ch. 7 - Prob. 6RQCh. 7 - Prob. 7RQCh. 7 - Prob. 8RQCh. 7 - For a TOF timer: a. When is the enable bit of a...Ch. 7 - Explain what each of the following quantities...
Ch. 7 - State the method used to reset the accumulated...Ch. 7 - Study the ladder logic program in Figure 7-40 and...Ch. 7 - Study the ladder logic program in Figure 7-42, and...Ch. 7 - Prob. 6PCh. 7 - Prob. 7PCh. 7 - Prob. 8PCh. 7 - Prob. 9PCh. 7 - Prob. 10PCh. 7 - Prob. 11PCh. 7 - Prob. 13PCh. 7 - When the lights are turned off in a building, an...
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