Database System Concepts
7th Edition
ISBN: 9780078022159
Author: Abraham Silberschatz Professor, Henry F. Korth, S. Sudarshan
Publisher: McGraw-Hill Education
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As part of the von Neumann architecture, the a) processing unit and b) programmer counter serve which of the following?
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- Under the von Neumann architecture, a program and its data are both stored in memory. Itis therefore possible for a program, thinking a memory location holds a piece of data when it actually holds a program instruction, to accidentally (or on purpose) modify itself. Whatimplications does this present to you as a programmer?arrow_forward13.write a small assembly languageu program that stores the data 46H and AH into the stack memory addressed by 600H and 602H, then store the first in AX and second in BX 14. Write a simpleo assembly languageu program to divide 90/9 using repeated subtraction?arrow_forwardTranslate the following C code to MIPS assembly, assuming that the variables f, g, h, i, and j correspond to registers $50, $s1, $s2, $s3, and $54 respectively. Also, assume that the base addresses of arrays A and B are contained in $56 and $s7 respectively, and that each element of arrays A and B are 4-byte words: B[8] =A[i] + A[j]; Which of the following MIPS assembly code snippets correctly performs the above operation? sll $t1, $s3, 2; add $t1, $56, $t1; lw $12, 0($t1); sll $t1, $s4, 2; add $11, $s6, St1; lw $13, 0($t1); add $12, $12, $t3; sw $12, 32($s7) sll $t1, $s3, 2; add $11, $s6, $t1; lw $12, 0($t1); sll $t1, $s4, 2; add $11, $s6, $t1; lw $13, 0($t1); add $t4, $12, $t3; sll $15, $t0, 2; add $15, $s7, $15; sw $t4, 32($15) Iw $11,0($s3); Iw $12, 0($s4); add $13, $11, $12; sw $13, 32($s7) sll $t1, $s3, 2; lw $12, 0($t1); sll $t1, $s4, 2; lw $13, 0($t1); add $t4, $t2, $t3; sw $t4, 32($s7)arrow_forward
- PLEASE HELParrow_forwardH.W.: Consider a hypothetical machine with two steps instruction cycle: fetch cycle and execute cycle. The characteristics of the machine is given in Figure 8 with the following explanation: The processor contains a single data register, called an accumulator (AC). • Both instructions and data are 8 bits long. • The memory is organized using 8-bit words. • The instruction format provides 2 bits for the opcode, and up to 26 = 64 words of memory can be directly addressed. Opcode Address (a) Instruction format Magnitude (b) Integer format Program counter (PC)= Address of instruction Instruction register (IR)- Instruction being executed Accumulator (AC) Temporary storage (c) Internal CPU registers -Load AC from memory Store AC to memory - Add to AC from memory (d) Partial list of opcodes Figure 8 Characteristics of a Hypothetical Machine Figure 9 illustrates a partial program execution, showing the relevant portions of memory and processor registers after the first instruction, 64H has…arrow_forwardIn generall, computers think in terms of numbers (i.e. binary data). Thus, any operation performed in the computer must be done using either mathematical or logical operations. Given this inherit limitation of computers, what is the compare instruction actually doing when we, as assembly programmers, provide two numbers for it to "compare"? Furthermore, what assembly instruction is similar to the compare instruction? How are the two instructions different?arrow_forward
- Assume that the instruction pointer, EIP, contains 9810 and the assembly language representation of the instruction in memory at address 9810 is JAE 131. If the flags are currently CF=1, ZF=0 and SF=0 what is the value of the EIP after the instruction executes? The answer 102 is not correct so what is the correct answer?arrow_forwardWhich of the following functions do the processor unit and programmer counter fulfill in the von Neumann architecture?arrow_forward
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