Consider a hypothetical microprocessor generating a 16-bit address (for example, as- sume that the program counter and the address registers are 16 bits wide) and having a 16-bit data bus. a. What is the maximum memory address space that the processor can access directly if it is connected to a "16-bit memory"? b. What is the maximum memory address space that the processor can access directly if it is connected to an "8-bit memory"? c. What architectural features will allow this microprocessor to access a separate "I/O space"?

A digital computer has a memory unit with 24 bits per word. The instruction set consists of 150 different operations. All instructions have an operation code part (opcode) and an address part (allowing for only one address, similar to Marie). Each instruction is stored in one word of memory. a) How many bits are needed for the opcode? b) How many bits are left for the address part of the instruction? c) What is the maximum allowable size for memory?

Given a computer with 300 memory locations, each 18-bit assessable, how many bits of addressing are needed?  Given a computer with 10-bit addressability and 5 bits for the address, what's the maximum number of memory this computer can have in bits?

A digital computer has a memory unit with 32 bits per word. The instruction set consists of 110 different operations. All instructions have an operation code part (opcode) and two address fields: one for a memory address and one for a register address. This particular system includes eight general-purpose, user-addressable registers. Registers may be loaded directly from memory, and memory may be updated directly from the registers. Direct memory-to-memory data movement operations are not supported. Each instruction stored in one word of memory. At least, how many bits are needed for the opcode?