For a system, RAM = 64KB, Block size = 4 bytes, Cache size = 128 bytes, Direct mapped cache. Calculate the Hit ratio while CPU runs program “Test_Cache”. Also count how many blocks are replaced in cache memory assuming the cache is empty at the beginning. For the same RAM, block size and Cache memory, what would be the Hit ration in case of Fully Associative Mapping? For the same RAM, block size and Cache memory, what would be the Hit ration in case of 4-way Set Associative Mapping? Main Program—“Test_Cache”

Computer Networking: A Top-Down Approach (7th Edition)
7th Edition
ISBN:9780133594140
Author:James Kurose, Keith Ross
Publisher:James Kurose, Keith Ross
Chapter1: Computer Networks And The Internet
Section: Chapter Questions
Problem R1RQ: What is the difference between a host and an end system? List several different types of end...
icon
Related questions
Question

For a system, RAM = 64KB, Block size = 4 bytes, Cache size = 128 bytes, Direct mapped cache.
Calculate the Hit ratio while CPU runs program “Test_Cache”. Also count how many blocks are
replaced in cache memory assuming the cache is empty at the beginning.
For the same RAM, block size and Cache memory, what would be the Hit ration in case of Fully
Associative Mapping?
For the same RAM, block size and Cache memory, what would be the Hit ration in case of 4-way Set
Associative Mapping?
Main Program—“Test_Cache”

For a system, RAM = 64KB, Block size = 4 bytes, Cache size = 128 bytes, Direct mapped cache.
Calculate the Hit ratio while CPU runs program "Test_Cache". Also count how many blocks are
replaced in cache memory assuming the cache is empty at the beginning.
For the same RAM, block size and Cache memory, what would be the Hit ration in case of Fully
Function NSU-1
Memory address (decimal)
0136
Instruction-1
Instruction-2
Instruction-3
0137
Associative Mapping?
For the same RAM, block size and Cache memory, what would be the Hit ration in case of 4-way Set
0138
0139
Instruction-4 (return to Instruction-8 of main
Associative Mapping?
Main Program-"Test_Cache"
Memory address (decimal)
program --- Test Cache)
---- Function NSU-2
0003
Instruction-1
Memory address (decimal)
0004
Instruction-2
0128
Instruction-1
Instruction-3 (Call Function NSU-2)
Instruction-4
0005
0129
Instruction-2
0006
0130
Instruction-3
Instruction-7 (Call Function NSU-1)
Instruction-8
0007
0131
Instruction-4
0008
0132
Instruction-5
0009
Instruction-9 (End of program)
0133
Instruction-6 (return to Instruction-4 of main
program--- Test_Cache)
Transcribed Image Text:For a system, RAM = 64KB, Block size = 4 bytes, Cache size = 128 bytes, Direct mapped cache. Calculate the Hit ratio while CPU runs program "Test_Cache". Also count how many blocks are replaced in cache memory assuming the cache is empty at the beginning. For the same RAM, block size and Cache memory, what would be the Hit ration in case of Fully Function NSU-1 Memory address (decimal) 0136 Instruction-1 Instruction-2 Instruction-3 0137 Associative Mapping? For the same RAM, block size and Cache memory, what would be the Hit ration in case of 4-way Set 0138 0139 Instruction-4 (return to Instruction-8 of main Associative Mapping? Main Program-"Test_Cache" Memory address (decimal) program --- Test Cache) ---- Function NSU-2 0003 Instruction-1 Memory address (decimal) 0004 Instruction-2 0128 Instruction-1 Instruction-3 (Call Function NSU-2) Instruction-4 0005 0129 Instruction-2 0006 0130 Instruction-3 Instruction-7 (Call Function NSU-1) Instruction-8 0007 0131 Instruction-4 0008 0132 Instruction-5 0009 Instruction-9 (End of program) 0133 Instruction-6 (return to Instruction-4 of main program--- Test_Cache)
Expert Solution
trending now

Trending now

This is a popular solution!

steps

Step by step

Solved in 2 steps

Blurred answer
Recommended textbooks for you
Computer Networking: A Top-Down Approach (7th Edi…
Computer Networking: A Top-Down Approach (7th Edi…
Computer Engineering
ISBN:
9780133594140
Author:
James Kurose, Keith Ross
Publisher:
PEARSON
Computer Organization and Design MIPS Edition, Fi…
Computer Organization and Design MIPS Edition, Fi…
Computer Engineering
ISBN:
9780124077263
Author:
David A. Patterson, John L. Hennessy
Publisher:
Elsevier Science
Network+ Guide to Networks (MindTap Course List)
Network+ Guide to Networks (MindTap Course List)
Computer Engineering
ISBN:
9781337569330
Author:
Jill West, Tamara Dean, Jean Andrews
Publisher:
Cengage Learning
Concepts of Database Management
Concepts of Database Management
Computer Engineering
ISBN:
9781337093422
Author:
Joy L. Starks, Philip J. Pratt, Mary Z. Last
Publisher:
Cengage Learning
Prelude to Programming
Prelude to Programming
Computer Engineering
ISBN:
9780133750423
Author:
VENIT, Stewart
Publisher:
Pearson Education
Sc Business Data Communications and Networking, T…
Sc Business Data Communications and Networking, T…
Computer Engineering
ISBN:
9781119368830
Author:
FITZGERALD
Publisher:
WILEY