EXPERIMENT_2

A.  One way to think of the basic logic gate types (all but the EXOR and EXNOR) is to consider what single input state guarantees a certain output state. For example, we could describe the function of an OR gate as such: “Any high input guarantees a high output.”            Identify what type of gate is represented by each of the following phrases:            a) Any high input guarantees a low output.            b) Any low input guarantees a high output.            c) Any low input guarantees a low output.

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By using the information given in image below design a BCD Counter. You have to provide all the necessary information needed to design this circuit.

5) Draw the circuit diagram using diode and write the truth table of a logic gates whose output will be the logical OR operation of two inputs.

Draw the logic diagram and transistor implementation for a (2-2-2) AOI.

Q1) For the circuits shown in figures 1 and 2: 1. What is the function of output? 2. Find the max. and min. Vol. value? 3. Determine the static power (avg.)? 4. Design equivalent logic circuit by CMOC logic circuits? Use VDD= 10 V. Vr.o=1V. Vru-1V. (W/L)o= (5/2), (W/L)L (20/2), RD = 40k, KL = 10P A/V^2 and KO = 40pA/V`2? Figure 1 5 VDD RD Figure 2 बदना दे

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Using 6 NMOS devices, design a NMOS style of the logic gates diagram below. Label the inputs and output.

Using 2-to-1 MUX and logic gates, build a logic circuit that compare between two binary number each of 2-bits.

VBE (on=Vac (RA) = 0.7V, V (sat) = 0.8V, Ve (sat= 0.15V,Vp (0n)=0.3V, 0 = 0.85, B = 0.25 %3D SED Q4. Open collector logic gate is shown in Figure. What logic function is performed by this circuit? | R F B O a. A B O b. A B A B O d. А. В O e. A· B А. В

What are the values of the inputs a, b, c, d, e, f and g for a Seven-Segment LED that displays the number 2? Assume active high logic. a) 1101101 b) 1010101 c) 1101110 d) None of the above e) All of the above

Figure Q2(e) shows a programmable logic array (PLA) unit with two inputs, four columns, and three outputs. Show the steps to implement a one-bit comparator using this PLA. Note that the output should have equal (EQ), less than (LT), and greater (GT) status. A, 02 Figure Q2(e)

Course:Digital Electronics

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Logic diagram for a 3-input AND gate using NAND gates.

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Please may you give the solution to this computer science question! Thank you

subject: Digital Logic &Design Q:  Describe the operation of a basic parity generating and checking logic

Electrical Engineering 1. Illustrate (then describe briefly): Procedure in testing the seven basic logic gates: a. AND; b. OR; c. XOR; d. NAND; e. NOR; f. XNOR; and g. the NOT. Give common faults (defects) of the seven basic logic gates. For each fault, list indicators that the gate is defective. Please completely answer the question

draw nand gate circuit diagram as well,please

Q2/A) Design 8x1 multiplexer using 2x1 multiplexer? Q2 B)Simplify the Logic circuit shown below using K-map then draw the Simplified circuit? Q2/C) design logic block diagram for adding 12 to 5 using full adder showing the input for each adder?

Convert the following logic gate circuit into a Boolean expression, writing Boolean sub-expressions next to each gate output in the diagram: C DD

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4. For the NOR gate function shown below a) Write the switching expression for the output, F(A,B,C,D) b) Simplify this switching function so that the only gates involved are AND, OR, and NOT gates. c) Draw the logic diagram of this simplified expression using only AND, OR, and NOT gates. am 1, S..pdf DII PrtScn F8 Home F9 End F10 F3 F4 F5 F6 F7 &

The diagram shows a transistor used to interface a logic gate to a lamp for it to be fully lit. Resistance of lamp=80 ohms 9Vo Signal from logic gate Ovo R Logic gate Output 0.2V 3.3V IB V₁ Lamp a) The logic gate outputs 0.3 for logic 0,and 3.3V for logic 1. Complete the table below to show the effect of these signals on the transistor and lamp by: i) Adding the correct voltages to the V1 column ii)writing either 'Off' or On to show the state of the lamp V1(V) same as VB When filly lit the, the lamp passes a current of 100mA. The transistor has a current gain, beta ẞ of 60 b)Calculate the base current, IB. c)Using KVL find the voltage drop across R. Sate of lamp

(e) Given a 2 input-4 column 3-output programmable logic array (PLA) device as shown in Figure Q2(e). Show the steps to implement a one-bit comparator using this PLA. Note that the output should have equal (EQ), less than (LT), and greater (GT) status. A. 02 Figure Q2(e)

Q2) Implement three input NOR gate using two Combinatorial Logic Module (Actel FPGA) only.

Q5. Design a decoder to convert the 421 BCD codes to drive a 7-segment LEDS that displays the patterns as shown in Figure Q5. Show the design and working steps in implementing your design using NOR gate ONLY in ONE logic diagram. 1 2 3 f off = '0' on = '1' d 4 5 6

3. Output voltages according to the input voltages of the logic gate given in Figure 1 are given in Table 1. Accordingly, which of the following is true? A) The voltage range in which the input can be defined as Logic 1 (One) is (0.7V, 5V). B) The voltage range in which the input can be defined as Logic 0 (Zero) is (0V, 0.8V) C) The critical (break) voltage range for the input is (1.2V, 4V). D) The voltage range that the input can be defined as Logic 1 (One) is (0.8V, 1.2V). E) The critical (breakdown) voltage range for the input is (0.5V, 0.8V).

Q1// What are the difference between Logic Devices and Programmable Logic Devices? Q2// Explain the advantage's of Programmable Logic Devices? Q3// List the disadvantages of Fixed function logic devices. Q4// Compare between Logic Devices and Programmable Logic Devices?