Chapter 13, Problem 13.1P

Consider the simple MOS op−amp circuit shown in Figure P13.1. The biascurrent is $I_Q=200\mu \text{A}$ . Transistor parameters are ${k^{\prime }}_n=100\mu {\text{A/V}}^{\text{2}}$ ${k^{\prime }}_p=40\mu {\text{A/V}}^{\text{2}}$ , $V_{TN}=0.4\text{V}$ , $V_{TP}=-0.4\text{V}$ , and ${\lambda }_n={\lambda }_p=0$ . The width−to−length ratio (W/L) for $M_1$ and $M_2$ is 20 and for $M_3$ is 40. (a) Design the circuitsuch that $I_{D3}=200\mu \text{A}$ and ${\upsilon }_o=0$ when ${\upsilon }_1={\upsilon }_2=0$ . (b) Find the small signal voltage gains (i) $A_d={\upsilon }_{o1}/{\upsilon }_d$ and (ii) $A_2={\upsilon }_o/{\upsilon }_{o1}$ . (c) Determinethe overall small−signal voltage gain $A={\upsilon }_o/{\upsilon }_d$ .

Figure P13.1