Explanation of Solution
Determining Cache Block, Cache set Index and Cache Tag:
The program running on a machine references the 1-byte word at any hexadecimal address.
Hexadecimal is a number system of base 16As and as hex system has 16 digits, the extra needed 6 digits are represented by the first 6 letters of English alphabet which means “ 0,1,2,3,4,5,6,7,8” represents “9,A,?B,?C,?D,?E,?F” respectively in decimal system.
First, one needs to convert the hexadecimal address into binary form:
For example, “
One needs to consider the following set associative (S, E, B, m) = (8, 4, 4, 13). The derived value will be as follows:
The Index (CI):
Want to see the full answer?
Check out a sample textbook solutionChapter 6 Solutions
Computer Systems: A Programmer's Perspective Plus Mastering Engineering With Pearson Etext -- Access Card Package (3rd Edition)
- Q3) A computer system has 1 Mbyte of main memory, 16 bytes block size, and 64 Kbytes cache memory. a. For the main memory addresses of CABBE, 01234, and, FO010 find tag, cache line address, and word offsets for a direct- mapped cache. b. Give any two main memory addresses with different tags that map to the same cache slot for direct-mapped cache.c. For the main memory addresses of CABBE and, FO010 find tag and word offset values for a fully-associative cache. d. For the main memory addresses of CABBE and, FO010 find tag, cache set, and word offset values for a two-way set- associative cache.arrow_forward< 5:37: Assembly Language Pro... Pointer Example ● • This is Example 4.4 from the textbook which demonstrates the use of the Loadl and Storel instructions to print a string • It is important to remember that at the assembly level, all I/O is character-based and only one character at a time can be sent to an output device Getch, Outp, One, Chptr, String, LoadI Chptr Skipcond 400 Jump Outp Halt Output Load Chptr Add One Store Chptr Jump Getch Hex 0001 Hex 00B Dec 072 Dec 101 Dec 108 Dec 108 Dec 111 Dec 032 Dec 119. Dec 111 Dec 114 Dec 108 Dec 100 Dec 033 Dec 000 /H /e /1 /1 / [space] /W /0 /r /1 /d /[null] LTE 100 D /Load the character found at /address Chptr /If AC = 0, skip next instruction /Otherwise, proceed with operation /Output the character /Move pointer to next character /Jump to "current" character /Pointer to "current" character /String definition starts herearrow_forward9. (10pt) For MESI snooping protocol, specify cache states in processors P1, P2, and P3 for each step. Assumes initial cache state is invalid.arrow_forward
- Electrical Engineering 1.) Consider the following series of address references, given as byte addresses: 4. 16, 32, 20, 80, 68, 76, 224, 36, 44, 16, 172, 20, 24, 36, 68 Label each reference as a hit or miss, and show the final cache contents, for each of the following caches. Assume LRU replacement (where appropriate). a.) Direct-mapped, 16x 4-byte blocks. b.) Direct-mapped, 16-byte blocks, total size of 64 bytes. c.) Two-way set associative, 4-byte blocks, total size of 64 bytes. d.) Fully associative, 4-byte blocks, total size of 64 bytes.arrow_forwardQ(5) A memory system and a direct mapped cache with following characteristics is given. Main memory size is 64 K bytes. Memory addresses are 16 bits and block size is of 16 bytes. A direct mapped cache of 256 bytes is used which is initially empty. (a) How is the 16-bit memory address allocated to tag, line and offset fields.arrow_forwardComputer Science Q1. Part a) A memory is byte addressable and has a 18-bit address. All the addresses are valid. What is the total size of the memory? Part b) A memory is byte addressable and has a total size of 20,480 bytes (20 KB). What is the smallest address size that can be used for this memory?arrow_forward
- Performance: *(15 min.] Your computer has a cache that is utilized 40% of the time. You would like to improve the performance of the cache to improve the overall performance of your computer. How fast your cache should be to achieve 1.5 times better overall processor performance? Do not write just numbers. Show your work.arrow_forward(A) In this exercise we look at memory locality properties of matrix computation. The following code is written in C, where elements within the same row are stored contiguously. Assume each word is a 64-bit integer. for (I-0; I<8; I++) for (J-0; J<8000; J++) A[I] [J]-B [I] [0] +A[J] [I]; 1. How many 64-bit integers can be stored in a 16-byte cache block? 2. Which variable references exhibit temporal locality? 3. Which variable references exhibit spatial locality? (B) Locality is affected by both the reference order and data layout. The same computation can also be written below in Matlab, which differs from C in that it stores matrix elements within the same column contiguously in memory. 1. How many 64-bit integers can be stored in a 16-byte cache block? 2. Which variable references exhibit temporal locality? 3. Which variable references exhibit spatial locality? 4. How many 16-byte cache blocks are needed to store all 64-bit matrix elements being referenced using Matlab's matrix…arrow_forward(b) In a two-level cache system, it is known that a program has 1000 instructions with memory references, of which 40 misses occur in the first level cache and 10 misses in the second level cache. Calculate the local miss rate for each level of the cache, and give the global cache miss rate of the cache system.arrow_forward
- An-Najah National University Department of Computer Engineering Microprocessors (10636322) Assignment # 1 Answer the following: 1- Write an 8086-assembly program that reads only vowels (a, e, i, o, u) from the keyboard (other characters are not excepted) and store them in a character array of 10 bytes long. Vowels entered after the array is full should be discarded. The program should stop reading characters when a 'S' is entered. When the 'S' character is entered, the program should output a new line, followed by the contents of the character array, with a space character between each vowel. 2- Write an assembly code to sort a word array of 50 numbers in ascending order. 3- The perfect number is defined as an integer which is equal to the sum of its divisors. Example: 28 is perfect number because 28 = 1+2+4 +7+ 14. Write an inline assembly e function that will takes an integer number as parameter and check whether it is a perfect number or not. Use the function in complete program. 4-…arrow_forwardQuestion 3 (Cache Memory Mapping): I (a) For the main memory address 0:0:0, briefly explain how a search is performed in two-way set associative mapping. Assume that the main memory size is 4 GB, the cache memory is 8 KB and the size of cache block is 32 bytes. (b) A 4-way set associative mapped cache consists of 64 blocks, divided into 4 sets. Main memory consists of 4K blocks, each containing 128 locations. Complete the following format for the main memory address by showing all your workings and find the tag size. [Hint: Calculate the no. of locations in the main memory, which gives the memory size in terms of the total number of bits] , Set No. Block No. Location Within Block No. of bitsarrow_forwardplease sol Q1) Given a memory of 16k and a cache memory of 1024 bytes with block size 128 bytes. Thesystem uses Direct mapping.A- How many blocks available in both physical memory and cache memory B- How the address will be split to indicate tag, line (block no) and offsetC- Calculate the cache line number and offset in cache that will contain the content ofmemory address 230.arrow_forward
- Database System ConceptsComputer ScienceISBN:9780078022159Author:Abraham Silberschatz Professor, Henry F. Korth, S. SudarshanPublisher:McGraw-Hill EducationStarting Out with Python (4th Edition)Computer ScienceISBN:9780134444321Author:Tony GaddisPublisher:PEARSONDigital Fundamentals (11th Edition)Computer ScienceISBN:9780132737968Author:Thomas L. FloydPublisher:PEARSON
- C How to Program (8th Edition)Computer ScienceISBN:9780133976892Author:Paul J. Deitel, Harvey DeitelPublisher:PEARSONDatabase Systems: Design, Implementation, & Manag...Computer ScienceISBN:9781337627900Author:Carlos Coronel, Steven MorrisPublisher:Cengage LearningProgrammable Logic ControllersComputer ScienceISBN:9780073373843Author:Frank D. PetruzellaPublisher:McGraw-Hill Education