Explanation Given: The circuit is given as: A resistor tolerance= ± 100 ε % The worst case CMRR= 20 log [ K + 1 4 ε ] Differential gain =100V/V. CMRR =80 dB . Calculation: Applying the super position principle to the given circuit, consider one voltage and short circuit the other voltage source. Here, assume first v i 2 = 0 Therefore, it will operate as non-inverting amplifier: The output voltage: v o 1 = − R 2 R 1 v i 1 Now, considering the other source, v i 1 = 0 Output voltage for the non-inverting configuration: v o 2 = ( R 4 R 4 + R 3 ) ( 1 + R 2 R 1 ) v i 2 The final output voltage by the super position theorem: v o = v o 1 + v o 2 Substituting the known values into the above equation: v o = v o 1 + v o 2 v o = − R 2 R 1 v i 1 + ( R 4 R 4 + R 3 ) ( 1 + R 2 R 1 ) v i 2 In op-amp, the value of output voltage: v i 1 = v i c m − v i d 2 and v i 2 = v i c m + v i d 2 Hence, v o = − R 2 R 1 ( v i c m − v i d 2 ) + ( R 4 R 4 + R 3 ) ( 1 + R 2 R 1 ) ( v i c m + v i d 2 ) v o = − R 2 R 1 v i c m + R 2 R 1 v i d 2 + ( R 4 R 4 + R 3 ) ( 1 + R 2 R 1 ) v i c m + ( R 4 R 4 + R 3 ) ( 1 + R 2 R 1 ) v i d 2 v o = v i d ( R 2 2 R 1 + R 2 2 R 1 ( R 4 R 4 + R 3 ) ( 1 + R 1 R 2 ) ) + v i c m ( − R 2 R 1 + R 2 R 1 ( R 4 R 4 + R 3 ) ( 1 + R 1 R 2 ) ) v o = v i d R 2 2 R 1 ( 1 + ( 1 + R 1 R 2 1 + R 3 R 4 ) ) + v i c m R 2 R 1 ( − 1 + ( 1 + R 1 R 2 1 + R 3 R 4 ) ) v o = v i d R 2 2 R 1 ( 1 + ( 1 + R 1 R 2 1 + R 3 R 4 ) ) + v i c m R 2 R 1 ( − 1 + ( 1 + R 1 R 2 1 + R 3 R 4 ) ) v o = v i d R 2 2 R 1 ( 1 + 1 ) + v i c m R 2 R 1 ( − 1 + 1 ) v o = v i d R 2 R 1 + v i c m R 2 R 1 ( 0 ) Above equation is written in the form of v o = v i d A d + v i c m A c m Comparing this equation with the above equation: A d = R 2 R 1 A c m = 0 The Common mode rejection ratio (CMRR): C M R R = 20 log | A d A c m | where, A d = R 2 2 R 1 ( 1 + ( R 1 R 2 + 1 R 1 R 2 + 1 ) ) A c m = ( R 4 R 4 + R 3 ) ( 1 + R 2 R 3 R 1 R 4 ) Then, C M R R = 20 log | R 2 R 1 ( R 4 R 4 + R 3 ) ( 1 + R 2 R 3 R 1 R 4 ) | C M R R = 20 log | 1 2 ( 2 + R 1 R 2 + R 3 R 4 ) R 1 R 2 − R 3 R 4 | C M R R = 20 log | 1 + R 1 2 R 2 + R 3 2 R 4 R 1 R 2 − R 3 R 4 | The tolerance of all the resistors are given as ± 100 ε %

Microelectronic Circuits (The Oxford Series in Electrical and Computer Engineering) 7th edition

7th Edition

ISBN: 9780199339136

Author: Adel S. Sedra, Kenneth C. Smith

Publisher: Oxford University Press

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Chapter 2, Problem 2.66P

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The worst case CMRR for an amplifier by using the given condition and the resistor tolerance is needed for given CMRR.

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Chapter 2, Problem 2.65P

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Find the value of the output voltage for the amplifier shown in the picture below, if the input voltages are V1 = 0.3 V and V2 = -0.2 V. The resistor values are: R1 = 1.2 kΩ, and R2 = 3 kΩ and Rf=10.1 kΩ. Enter the result accurate to 2 decimal points.

For the emitter-follower (common- collector) amplifier circuit shown in Fig. 1, determine: (a) Voltage gain, A, =V,/Vi, (b) Current gain, A; =1/1I; (c) Input impedance, Z;, and (d) Output impedance, Z,. Assume that: B = hg =100, r.=30€Q, and hj. = f.r. = 3kQ. Hint: Solve the homework and draw the ac equivalent circuit by using r or h model.

(a) We would like to measure the voltage (V = V1 − V2) appearing across the 20-kΩ resistor shown with a voltmeter. What is the value of V? What is the common-mode voltage associated with V(VCM = (V1 +V2)/2)? What CMRR is required of the voltmeter if we are to measure V with an error of less than 0.01 percent? (b) Repeat if the 10-kΩ resistor is changed to 100 Ω.

Chapter 2 Solutions

Microelectronic Circuits (The Oxford Series in Electrical and Computer Engineering) 7th edition

Ch. 2.1 - Prob. 2.1E Ch. 2.1 - Prob. 2.2E Ch. 2.1 - Prob. 2.3E Ch. 2.2 - Prob. D2.4E Ch. 2.2 - Prob. 2.5E Ch. 2.2 - Prob. 2.6E Ch. 2.2 - Prob. D2.7E Ch. 2.2 - Prob. D2.8E Ch. 2.3 - Prob. 2.9E Ch. 2.3 - Prob. 2.10E

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Chapter 2 Solutions