Chapter 16, Problem 16.4TYU

(a) Design a three−input NMOS NOR Logic gate with depletion load such that $V_{OL}\left(\max \right)=50\text{mV}$ and such that the maximum power dissipation is $50\mu \text{W}$ . Let $V_{DD}=2.5\text{V}$ . The transistor parameters are ${k^{\prime }}_n=100\mu {\text{A/V}}^{\text{2}}$ , $V_{TND}=0.4\text{V}$ , and $V_{TNL}=-0.6\text{V}$ . (b) Using the results of part (a), determine $V_{OL}$ when all inputs are a logic 1. (Ans. (a) ${\left(W/L\right)}_L=1.11$ , ${\left(W/L\right)}_D=1.93$ ; (b) $V_{OL}=16.5\text{mV}$ )