Microelectronic Circuits (The Oxford Series in Electrical and Computer Engineering) 7th edition
7th Edition
ISBN: 9780199339136
Author: Adel S. Sedra, Kenneth C. Smith
Publisher: Oxford University Press
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Chapter 5, Problem 5.28P
To determine
To sketch: The graph of current
Also, the equations for various portions of the resulting graph.
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For many years, MOS devices were scaled tosmaller and smaller dimensions without changingthe power supply voltage. Suppose that the widthW, length L, and oxide thickness Tox of a MOS transistor are all reduced by a factor of 2. Assume thatVT N , vGS, and vDS remain the same. (a) Calculatethe ratio of the drain current of the scaled device tothat of the original device. (b) By what factor hasthe power dissipation changed? (c) By what factorhas the value of the total gate capacitance changed?(d) By what factor has the circuit delay Tchanged?
The NMOS transistor shown in the circuit has k = 2 mA/V2 and VTH = 1 V. If V+ = 9 V and VG = 4 V, determine the drain current. Express your answer in milliamperes, accurate to two decimal places. Hint: The transistor is operating in linear mode.
Consider the transistor characteristics of Fig. 5.21.
(a) Are these the characteristics of a JFET, d-mosfet, or e-mosfet?
(b) Make a table of the given Vgs values and the corresponding Id(sat) values. Also include a column in the table giving Id(sat).
(c) Make a plot of Id(sat) versus Vgs. Find the slope and y-intercept of the plot and use these to determine values for K and Vt in the model equation Eq. (5.3).ANSWER TO (c) MUST BE K = 1 mA/V2, Vt = −3 V
Chapter 5 Solutions
Microelectronic Circuits (The Oxford Series in Electrical and Computer Engineering) 7th edition
Ch. 5.1 - Prob. 5.1ECh. 5.1 - Prob. 5.2ECh. 5.1 - Prob. D5.3ECh. 5.2 - Prob. 5.4ECh. 5.2 - Prob. 5.5ECh. 5.2 - Prob. 5.6ECh. 5.2 - Prob. 5.7ECh. 5.3 - Prob. D5.8ECh. 5.3 - Prob. D5.9ECh. 5.3 - Prob. D5.10E
Ch. 5.3 - Prob. 5.11ECh. 5.3 - Prob. 5.12ECh. 5.3 - Prob. D5.13ECh. 5.3 - Prob. D5.14ECh. 5.3 - Prob. 5.15ECh. 5.4 - Prob. 5.16ECh. 5.4 - Prob. 5.17ECh. 5 - Prob. 5.1PCh. 5 - Prob. 5.2PCh. 5 - Prob. 5.3PCh. 5 - Prob. 5.4PCh. 5 - Prob. D5.5PCh. 5 - Prob. 5.6PCh. 5 - Prob. D5.7PCh. 5 - Prob. 5.8PCh. 5 - Prob. 5.9PCh. 5 - Prob. 5.10PCh. 5 - Prob. 5.11PCh. 5 - Prob. 5.12PCh. 5 - Prob. 5.13PCh. 5 - Prob. 5.14PCh. 5 - Prob. 5.15PCh. 5 - Prob. 5.16PCh. 5 - Prob. 5.17PCh. 5 - Prob. 5.18PCh. 5 - Prob. 5.19PCh. 5 - Prob. D5.20PCh. 5 - Prob. 5.21PCh. 5 - Prob. 5.22PCh. 5 - Prob. 5.23PCh. 5 - Prob. 5.24PCh. 5 - Prob. 5.25PCh. 5 - Prob. 5.26PCh. 5 - Prob. 5.27PCh. 5 - Prob. 5.28PCh. 5 - Prob. 5.29PCh. 5 - Prob. 5.30PCh. 5 - Prob. 5.31PCh. 5 - Prob. D5.32PCh. 5 - Prob. D5.33PCh. 5 - Prob. 5.34PCh. 5 - Prob. 5.35PCh. 5 - Prob. D5.36PCh. 5 - Prob. 5.37PCh. 5 - Prob. 5.38PCh. 5 - Prob. 5.39PCh. 5 - Prob. 5.40PCh. 5 - Prob. 5.41PCh. 5 - Prob. 5.42PCh. 5 - Prob. 5.43PCh. 5 - Prob. D5.44PCh. 5 - Prob. 5.45PCh. 5 - Prob. D5.46PCh. 5 - Prob. 5.47PCh. 5 - Prob. D5.48PCh. 5 - Prob. D5.49PCh. 5 - Prob. D5.50PCh. 5 - Prob. D5.51PCh. 5 - Prob. 5.52PCh. 5 - Prob. D5.53PCh. 5 - Prob. 5.54PCh. 5 - Prob. 5.55PCh. 5 - Prob. 5.56PCh. 5 - Prob. 5.57PCh. 5 - Prob. 5.58PCh. 5 - Prob. 5.59PCh. 5 - Prob. 5.60PCh. 5 - Prob. 5.61PCh. 5 - Prob. 5.62PCh. 5 - Prob. 5.63PCh. 5 - Prob. 5.64PCh. 5 - Prob. 5.65PCh. 5 - Prob. 5.66PCh. 5 - Prob. 5.67P
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- ı just need fınal answer Considering the dc operating conditions of the NMOS circuit in the figure, gm = 1.5 mS was obtained. Also, the load current IL flowing through RL when Rsig1 = 2 kΩ, Rsig2 = 3 kΩ, RF = 60 kΩ, R1 = 50 MΩ, R2 = 12 MΩ, RD = 4.7 kΩ, RS = 1.2 kΩ and RL = 13.3 kΩ What would be the value of ? (Vi1 = 20 mV, Vi2 = 30 mV) NOTE-1: Capacitors are negligible at mid-band frequency. NOTE-2: The NMOS output impedance will be taken into account and its value is rd = 20 kΩ. a. 0,28 mA b. 0,20 mA c. 0,84 mA d. 0,40 mA e. 0,52 mA f. 0,72 mA g. 0,60 mA h. 0,12 mAarrow_forwardConsidering the dc operating conditions of the NMOS circuit in the figure, gm = 4.1 mS was obtained. Also, the load current IL flowing through RL when Rsig1 = 2 kΩ, Rsig2 = 3 kΩ, RF = 60 kΩ, R1 = 50 MΩ, R2 = 12 MΩ, RD = 4.7 kΩ, RS = 1.2 kΩ and RL = 10.2 kΩ What would be the value of ? (Vi1 = 20 mV, Vi2 = 30 mV) NOTE-1: Capacitors are negligible at mid-band frequency. NOTE-2: The NMOS output impedance will be taken into account and its value is rd = 20 kΩ.arrow_forwardConsidering the dc operating conditions of the NMOS circuit in the figure, gm = 4.1 mS was obtained. Also, the load current IL flowing through RL when Rsig1 = 2 kΩ, Rsig2 = 3 kΩ, RF = 60 kΩ, R1 = 50 MΩ, R2 = 12 MΩ, RD = 4.7 kΩ, RS = 1.2 kΩ and RL = 10.2 kΩ What would be the value of ? (Vi1 = 20 mV, Vi2 = 30 mV) NOTE-1: Capacitors are negligible at mid-band frequency. NOTE-2: The NMOS output impedance will be taken into account and its value is rd = 20 kΩ. a. 1,34 mA b. 0,40 mA c. 1,74 mA d. 0,94 mA e. 0,67 mA f. 2,01 mA g. 2,81 mA h. 2,41 mAarrow_forward
- Design the circuit of Fig. P5.43 to establish a drain current of 0.1 mA and a drain voltage of +0.2 V. The MOSFET has Vt = 0.2 V, μnCox = 400 μA/V2, L = 0.5 μm, and W = 4 μm. Specify the required values for RS and RD. Assume λ = 0.arrow_forwardConsidering the dc operating conditions of the NMOS circuit in the figure, gm = 1.9 mS was obtained. Also, the load current I flowing through RL when Rsig1 = 2 k2, Rsig2= 3 kQ2, RF = 60 KQ2, R1 = 50 MS2, R2 = 12 MS2, RD= 4.7 k, RS = 1.2 KQ and RL = 11.3 k What would be the value of ? (Vi1 = 20 mV, Vi2 = 30 mV) NOTE-1: Capacitors are negligible at mid-band frequency. NOTE-2: NMOS output impedance will be considered. and its value is rd = 20 k (Q=ohm) (S2=ohm)arrow_forwardConsidering the given transistor circuit and given values(β=60; V BE =0,5 V; VCC =15V; R E=1K ; R c=10K ; R1=60K ;R2=30K ).a. Find the base, collector, and emitter currents b. Find the voltage gain of this circuit c. Find the voltage gain by ignoring the capacitor connected to the emitterd. Briefly describe the transistor active zone and state its importancearrow_forward
- The channel resistance of a MOSFET can be computed by getting the reciprocal of the derivative of the drain current with respect to the drain to source voltage. Compute the channel resistance (in Ω) of an NMOS operating in the linear region given the following MOSFET specifications: k = 2.39μA/V2, W/L = 157, VGS = 4V, VTH = 0.90V, and VDS = 0.24V.arrow_forwardDesign a four-resistor bias network for an npntransistor to give IC = 1 mA, VC E = 5 V, andVE = 3 V if VCC = 12 V and βF = 100. (b) Replaceyour exact values with the nearest values from theresistor and find the resultingQ-pointarrow_forwardConsidering the operating conditions of the NMOS circuit in the figure, 9m = 1.9 m was obtained. Also,RL when Rsig1 = 2 ko, Rsig2 = 3 kA, RF = 60 kg, R1 = 50 MQ, R2 = 12 MA, RD = 4.7 ko, RS = 1.2 kq and RL = 11.3 koWhat is the value of the load current li flowing through it? (Vi1 = 20 mV, Vi2 = 30 mV)NOTE-1: Capacitors are negligible at mid-band frequency.NOTE-2: NMOS output impedance will be taken into account and its value is ra = 20 ko.arrow_forward
- From the circuit shown, if the inputs A and B are 0 and 1 respectively, Q5 is/has/will a) a negative base-collector voltage b) at cut-off c) a collector-emitter voltage approximately 0 V d) cause the LED to turn offarrow_forwardAn npn transistor with IS = 5 × 10−16 μA, αF =0.95, and αR = 0.5 is operating with VB E = 0.3 Vand VBC = −5 V. This transistor is not truly operating in the region defined to be cutoff, but we still saythe transistor is off. Why? Use the transport modelequations to justify your answer. In what region isthe transistor actually operating according to ourdefinitions?arrow_forwardThe PMOS transistor in the circuit shown has k = 2 mA/V2 and VTH = -1 V. If V+ = 6.5 V and VG = 4 V, determine the drain current. Express you answer in milliamperes, accurate to two decimal points. Hint: The transistor is operating in saturation mode.arrow_forward
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